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Overview

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OnRefer to https://wiki.trenz-electronic.de/display/PD/TE0729+TRM thefor online version of this manual and additional othertechnical documentsdocumentation canof bethe foundproduct.
 

The Trenz Electronic TE0729 is an industrial-grade SoM (System on Module) based on Xilinx Zynq-7000 SoC (XC7Z020).

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  • Industrial-grade Xilinx Zynq-7000 (XC7Z020) SoM
    • Dual-core ARM Cortex-A9 MPCore™ with CoreSight™
    • 136 x FPGA I/Os (58 LVDS pairs possible)
    • 8 x PS MIO pins
  • 16-bit wide 512 MByte DDR3 SDRAM
  • 32 MByte QSPI Flash memory
  • 4 GByte eMMC Flash memory
  • 1 x 10/100/1000 Mbps Ethernet transceiver PHY
  • 2 x 10/100 Mbps Ethernet transceiver PHY'sPHYs
  • 3 x MAC address EEPROM'sEEPROMs
  • Hi-speed USB 2.0 ULPI transceiver with full OTG support
  • Plug-on module with two 120-pin connectors
  • Evenly - spread supply pins for good signal integrity
  • On-board high-efficiency DC-DC converters
    • 4.0 A x 1.0 V power rail
    • 1.5 A x 1.5 V power rail
    • 1.5 A x 1.8 V power rail
    • 1.5 A x 2.5 V power rail
  • System management
  • eFUSE bit-stream encryption
  • AES bit-stream bitstream encryption
  • Temperature compensated RTC (real-time clock)
  • User LED
  • Rugged for shock and high vibration

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Block Diagram

Main Components

Image Removed

Initial Delivery State

Image Added Image Added

  1. Xilinx Zynq-7000 all programmable SoC, U2
  2. 32 MByte quad SPI Flash memory, U13
  3. 4 Gbit DDR3/L SDRAM, U1
  4. Low-power RTC with battery backed SRAM, U22
  5. 1A PowerSoC DC-DC converter (1.5V), U26
  6. System Controller CPLD, U6
  7. Low-power programmable oscillator @ 52.000000 MHz (OTG-RCLK), U12
  8. Hi-speed USB 2.0 ULPI transceiver, U11
  9. Gigabit Ethernet (GbE) transceiver, U3
  10. Ultra-low supply-current voltage monitor, U21
  11. 2K I2C serial EEPROM with EUI-48™ node identity, U9
  12. 2K I2C serial EEPROM with EUI-48™ node identity, U20
  13. 2K I2C serial EEPROM with EUI-48™ node identity, U8
  14. 1A PowerSoC DC-DC converter (2.5V), U24
  15. 1A PowerSoC DC-DC converter (1.8V), U25
  16. 4A PowerSoC DC-DC converter (1.0V), U23
  17. 3A PFET load switch with configurable slew rate (3.3V), Q1
  18. Serial number (traceability) pad
  19. Green LED D2 and red LED D8
  20. 10Base-T/100Base-TX Ethernet PHY, U19
  21. 10Base-T/100Base-TX Ethernet PHY, U17
  22. Low-power programmable oscillator @ 25.000000 MHz (ETH_CLKIN), U10
  23. 120-pin double-row REF-189019-02 B2B connector, J1
  24. Low-power programmable oscillator @ 33.333333 MHz (PS-CLK), U14
  25. SDIO port expander with voltage-level translation, U15
  26. eMMC NAND Flash, U5
  27. 120-pin double-row REF-189019-02 B2B connector, J2

Initial Delivery State

Storage device nameContentNotes

24AA025E48 EEPROMs

Storage device nameContentNotes

24AA025E48 EEPROM's

User content not programmed

Valid MAC Address address from manufacturer
eMMC Flash-MemoryEmpty, not programmedExcept serial number programmed by flash vendor

SPI Flash OTP Area

Empty, not programmed

Except serial number programmed by flash vendor

SPI Flash Quad Enable bit

Programmed

 

SPI Flash main array

demo Demo design

 

eFUSE USER

Not programmed

 

eFUSE Security

Not programmed

 

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JTAG access to the Xilinx Zynq-7000 device is provided through B2B connector J2.

SignalB2B Pin
TCKJ2-119
TDIJ2-115
TDOJ2-117
TMSJ2-113

 

Note

JTAGSEL pin in 111 of B2B connector J2 should be kept low or grounded for normal operation.

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ClockFrequencyICFPGANotes
PS-CLK33.3333 333333 MHzU14PS_CLKPS Subsystem subsystem main clock
10/100/1000 Mbps ETH PHY referenceETH_CLKIN25.000000 MHzU10-Ethernet PHYs reference clock
 USB PHY reference52.000000 MHzU12- USB PHY reference clock

Default MIO mapping

MIOConfigured asB2BNotes
0GPIO J2-87 B2B
1QSPI0 -SPI Flash-CS
2QSPI0 -SPI Flash-DQ0
3QSPI0 -SPI Flash-DQ1
4QSPI0 -SPI Flash-DQ2
5QSPI0 -SPI Flash-DQ3
6QSPI0 -SPI Flash-SCK
7GPIO -Red LED D8
8 - -QSPI feedback clock
9GPIOJ2-88B2B
10I2C0 SDAJ2-90B2B 
11I2C0 SCLJ2-92B2B
12I2C1 SDAJ2-93 B2B (SDA on-board I2C, also configurable as GPIO by user)
13I2C1 SCLJ2-95 B2B (SCL on-board I2C, also configurable as GPIO by user)
14USART0 RXJ2-94B2B (RX on-board UART, also configurable as GPIO by user)
15USART0 TXJ2-96B2B (TX on-board UART, also configurable as GPIO by user)
16..27ETH0 Ethernet RGMII PHY
28..39USB0 USB ULPI PHY
40SDIO0J2-100 
41SDIO0J2-102 
42SDIO0J2-104 
43SDIO0J2-106 
44SDIO0J2-108 
45SDIO0J2-110 
46GPIO-RTC Interrupt
47- - - 
48 GPIOSEL_SDSD Card multiplexer control
49GPIO -USB Reset
50GPIO -ETH0 Interrupt
51GPIO -ETH0 Reset
52ETH0 -MDC

53

ETH0 -MDIO

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PeripheralICDesignatorPSMIONotes
EEPROM I2C24AA025E48T-I/OTU8I2C0MIO10, MIO11MAC Address
EEPROM I2C24AA025E48T-I/OTU9I2C0MIO10, MIO11MAC Address
EEPROM I2C24AA025E48T-I/OTU20I2C0MIO10, MIO11MAC Address
RTCISL12020MIRZU22I2C0MIO10, MIO11Temperature compensated real time clock
RTC InterruptISL12020MIRZU22GPIOMIO46Real Time Clock Interrupt
SPI FlashS25FL256SAGBHI20U13QSPI0MIO1..MIO6 
Ethernet0 10/100/1000 Mbps PHY88E1512-A0-NNP2I000U3ETH0MIO16...MIO27 
Ethernet0 10/100/1000 Mbps PHY Reset  GPIOMIO51 
Ethernet1 10/100 Mbps PHYKSZ8081MLXCAU17-(EMIO) 
Ethernet1 10/100 Mbps PHY Reset  -(EMIO) 
Ethernet2 10/100 Mbps PHYKSZ8081MLXCAU19-(EMIO) 
Ethernet2 10/100 Mbps PHY Reset  -(EMIO) 
USBUSB3320C-EZKU11USB0MIO28...MIO39 
USB Reset  GPIOMIO49 
 eMMC eMMC (embedded eMMC)MTFC4GMVEA-4M IT  U5SDIO0MIO40...MIO45 

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Ethernet1 PHY connection to B2B-connectors:

PHY PINB2BnotesNotes
ETH1_RX_PJ2-26-
ETH1_RX_NJ2-28-
ETH1_TX_PJ2-20-
ETH1_TX_NJ2-22-
ETH1_LED0J2-34Status LED
ETH1_LED1J2-32Transmission LED

Ethernet2 PHY connection to B2B-connectors:

PHY PINB2BnotesNotes
ETH2_RX_PJ2-2-
ETH2_RX_NJ2-4-
ETH2_TX_PJ2-8-
ETH2_TX_NJ2-10-
ETH2_LED0J2-16Status LED
ETH2_LED1J2-14Transmission LED

All other pins of the PHYs are connected to Bank34 of Zynq, see schematic for further details.

USB Interface

The USB PHY Microchip USB3320 from Microchip is used on the TE0729. The is connected via ULPI interface is connected to the Zynq PS USB0.  The I/O Voltage voltage level is fixed at 1.8V .The and PHY reference clock input of the PHY is supplied from an the on-board 52MHz 52.000000 MHz oscillator (U12).  

PHY connection:

PHY PinZynq PinB2B NameNotes
ULPIMIO28..39-Zynq USB0 MIO pins are connected to the PHY
REFCLK--52MHz from on board oscillator (U12)
REFSEL[0..2]--000 All three connected to the GND, select 52MHz reference Clockselects 52.000000 MHz as reference clock
RESETBMIO49-Active-low reset
CLKOUTMIO36-Connected to 1.8V, selects reference clock operation mode
DP,DM-OTG_D_P, OTG_D_NUSB Data data lines
CPEN-VBUS_V_ENExternal USB power switch active-high enable signal
VBUS-USB_VBUSConnect Connected to the USB-VBUS via a series resistor. Check reference schematic
ID-OTG_IDFor an A-Device connect connected to the ground, for a B-Device left floating

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Battery backed registers are accessed at I2C slave address 0x57. General purpose RAM is accessed at I2C slave address 0x6F. This RTC IC is supported in by the Linux OS, so it can be used as hwclock device.

MAC-Address

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EEPROMs

TE0729 module has three Microchip 24AA025E48 EEPROMs

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Three Microchip 24AA025E48 EEPROM's (U8, U9 , and U20) are used on the TE0729. They which contain globally unique 48-bit node addresses, that are compatible with EUI-48(TM) and EUI-64(TM). The devices compatible 48-bit node (MAC) addresses. These EEPROMs are organized as two blocks of 128 x 8-bit memory. One of those the blocks stores the 48-bit node address and is write protected, the other block is available for application use. It is accessible through the I2C EEPROMs are accessible using I2C slave address 0x50 for MAC-Address1 (U8), 0x51 for MAC-Address2 (U9), 0x52 for MAC-Address3 (U20).

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TE0729 has support for hardware watchdog function. With standard variant, By default the watchdog is disabled at power up. Please contact Trenz Electronic for details how to enable watchdog function.

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ParameterMinMaxUnitsNotes

Vin VIN supply voltage

-0.1

3.75

V

 
VBAT supply voltage-0.36.0V 
PL IO Bank I/O bank supply voltage for HR I/O banks (VCCO)-0.53.6V 
I/O input voltage for HP HR I/O banks-0.55VCCO_X+0.55VTE0729 does not have HP banks 

Voltage on Module module JTAG pins

-0.4

VCCO_0+0.55

V

VCCO_0 is 3.3V nominal

Storage Temperaturetemperature

-40

+85

C

 
Storage Temperature temperature without the ISL12020MIRZ-55+100C 

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ParameterMinMaxUnitsNotesReference document
Vin VIN supply voltage2.53.6V  
VBAT supply voltage1.85.5V  
PL IO Bank I/O bank supply voltage for HR I/O banks (VCCO)1.143.465V Xilinx document DS191
I/O input voltage for HR I/O banks(*)(*)V(*) Check datasheetXilinx document DS191 and DS187
Voltage on module JTAG pins3.1353.465VVCCO_0 is 3.3 V nominal 

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DateRevisionContributorsDescription
2017-06-18
Jan KumannNew product images.
2017-06-07

V.21

Jan KumannMinor re-formatting.

2017-05-22

V.12

Jan Kumann

Sections rearranged for common style.

New physical dimension images.

Hardware revision image added.

New block diagram.

2017-03-24V.11John HartfielCorrection: Boot Mode settings.
2016-06-14V.10

Ali Naseri

Initial release.

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