Page History
...
I/O signals of the FPGA SoC's I/O banks connected to the board's pin headers:
| Bank | TypeB2B | ConnectorPin Header | I/O Signal Count | Bank Voltage |
|---|---|---|---|---|
| 14 | HR | J3 | 8 I/O's, 4 LVDS pairs | 1.8V |
| 34 | HR | J2 | 42 I/Os, 21 LVDS pairs | VCCIO34 |
| 35 | HR | J1 | 42 I/Os, 21 LVDS pairs | VCCIO35 |
...
Overview
Content Tools