Page History
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Issues | Description | Workaround | To be fixed version |
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For PCB REV01 only: CLK1B is not available on | addtional clk is not connected on PCB | use other internal generated CLK, maybe mor effort is needed to get ETH running | |
Timing fails for fmeter IP | Timing ignore constrains does not work for some signals. | This can be ignored | --- |
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Date | Document Revision | Authors | Description | ||||||||||||||||||||||
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2018-02-13 | v.19 | John Hartfiel |
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2018-01-08 | v.16 | John Hartfiel |
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2017-12-15 | v.15 | John Hartfiel |
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2017-11-07 | v.11 | John Hartfiel |
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2017-10-06 | v.10 | John Hartfiel |
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2017-10-05 | v.8 | John Hartfiel |
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2017-09-11 | v.1 |
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