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  • Modules/ SoC FPGA
    • Compatible with Digilent's Pmod interfaces

  • RAM/Storage
  • On Board
    • 1x 4x Current Sensor
    • 1x 4x ADC
    • 2x Terminal Blocks
    • 2x Power Regulators
    • 3x Half-Bridge Drivers
  • Interface
    • 2x Pmod Pin Header (2x6 Pol)
  • Power 
    •  3.3V supply voltage from Pmods
    • Supply current and voltage monitoring
  • Dimension
    • 40 mm x 40 mm

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Scroll Title
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titleTEP0002 block diagram


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Main Components

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titleTEP0002 main components


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  1. 2x6 PMod 2x6 Peripheral Header, J2J1
  2. 2x6 PMod 2x6 Peripheral Header, J1J2
  3. Power Regulators, U1-U7
  4. Hall Effect Linear Current SensorHalf Bridge Gate Drivers, U14-U17-U20
  5. Current Sensors, U15-U18-U21-U46
  6. ARK500-2 screw connector, J2
  7. ARK500-3 screw connector, J3
  8. Analog Digital Converter, U46

J3 connector

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  1.  U16-U19-U22-U47

Initial Delivery State

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Notes :

Only components like EEPROM,

J4 connector

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Initial Delivery State

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Notes :

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

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Scroll Title
anchorTable_SIP_Pmod
titleGeneral Pmod connectors information

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Pin Pmod J1Pmod J2Notes
1PWM_CH0ADC_CH
2PWM_CH1ADC AD_SCK
3PWM_CH2ADC_CS
4N.CSensor fault
5GNDGND
6VCCVCC
7EN_CH0ADC_DO0
8EN_CH1ADC_DO1
9EN_CH2ADC_DO2
10N.CADC_DO3
11GNDGND
12VCCVCC

On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs
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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

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anchorTable_OBP
titleOn board peripherals


Terminal blocks

The TEP0002 is equipped with two Terminal Blocks J3 and J4.

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anchorTable_SIP_TerBlk
titleTerminal Blocks information

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DesignatorPinSchematicNotes
J31DRV_CH2ARK500-3
2DRV_CH1ARK500-3
3DRV_CH0ARK500-3
J41DC_INARK500-2
2GNDARK500-2


On-board Peripherals

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hiddentrue
idComments

Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


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hiddentrue
idComments

Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


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RTC

I2C Address
Scroll Title
anchorTable_OBP_RTC
titleI2C interface MIOs and pins
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MIO PinSchematicU? PinNotes
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anchorTable_OBP_I2C_RTC
titleI2C Address for RTCOn board peripherals

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MIO Pin
Chip/InterfaceDesignatorNotes

LEDs

ADCU16,U19,U22,U47


Analog Digital Converters

The TEP0006 is equipped with four Analog Digital Converters. 

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anchorTable_OBP_LEDADC
titleOn-board LEDsADC Information

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Designator
Pin
Color
Connected to
Active LevelNote

Clock Sources

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anchorTable_OBP_CLK
titleOsillators

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Power and Power-On Sequence

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idComments

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit
Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

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anchorTable_PWR_PC
titlePower Consumption

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* TBD - To Be Determined

Power Distribution Dependencies

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anchorFigure_PWR_PD
titlePower Distribution
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Notes
ADC,U16ADC,U19ADC,U22ADC,U47
AVDD5AV5AV5AV5AV
REFCurrent Sensors,U17Current Sensors,U20Current Sensors,U22Current Sensors,U46VCC Pin
AIN0+DRV_CH0DRV_CH1DRV_CH2DC_IN
AIN0-GNDGNDGNDGND
AIN1+Current Sensors,U17Current Sensors,U20Current Sensors,U22Current Sensors,U46VIOUT Pin
AIN1-GNDGNDGNDGND
REFGNDGNDGNDGNDGND
DVDD3.3V3.3V3.3V3.3V
SCLKADC_SCKADC_SCKADC_SCKADC_SCKPMod J2
SDOADC0_DOADC1_DOADC2_DOADC3_DOPMod J2
nCSADC_CSADC_CSADC_CSADC_CSPMod J2
CH_SELADC_CHADC_CHADC_CHADC_CHPMod J2
PDENGNDGNDGNDGND
GNDGNDGNDGNDGND


Power and Power-On Sequence

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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

Scroll Title
anchorTable_PWR_PC
titlePower Consumption

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Power Input PinTypical Current
VINTBD*


* TBD - To Be Determined

Power Distribution Dependencies

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anchorFigure_PWR_PD
titlePower Distribution


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Power-On Sequence

There is no specific power on sequence, after power on the module all regulators will be enable.

Power Rails

Power-On Sequence

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anchorFigure_PWR_PS
titlePower Sequency
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Voltage Monitor Circuit

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titleVoltage Monitor Circuit
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Power Rails

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anchorTable_PWR_PR
titleModule power rails.

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Pmod  J1 Pin

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Pmod J2 Pin

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Bank Voltages

Notes
Scroll Title
anchorTable_PWR_BVPR
titleZynq SoC bank voltagesModule power rails.

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Power Rail Name

Pmod  J1 Pin

Pmod J2 Pin

DirectionNotes
3.3V6,126,12Input

Bank          

Schematic Name

Voltage