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changes.mady.by.user Pedram Babakhani

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changes.mady.by.user John Hartfiel

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  • Modules/ SoC FPGA

    • Compatible with Digilent's Pmod interfaces

  • RAM/Storage
  • On Board
    • 1x 4x Current Sensor
    • 1x 4x ADC
    • 2x Terminal Blocks
    • 2x Power Regulators
    • 3x Half-Bridge Drivers
  • Interface
    • 2x Pmod Pin Header (2x6 Pol)
  • Power 
    •  3.3V supply voltage from Pmods
    • Supply current and voltage monitoring
  • Dimension
    • 40 mm x 40 mm

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Scroll Title
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titleTEP0002 block diagram


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Main Components

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Scroll Title
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titleTEP0002 main components


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  1. 2x6 PMod 2x6 PMod Header, J2J12x6 PMod
  2. 2x6 PMod Header, J1J2
  3. Power Regulators, U1-U7
  4. Half Bridge Gate Drivers, U14-U17-U20
  5. Current Sensors, U15-U18-U21-U46
  6. ARK500-2 connector, J2
  7. ARK500-3 connector, J3
  8. Analog Digital Converter, U16-U19-U22-U47

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Scroll Title
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titleTerminal Blocks information

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DesignatorPinSchematicNotes
J31DRV_CH2ARK500-3
2DRV_CH1ARK500-3
3DRV_CH0ARK500-3
J41DC_INARK500-2
2GNDARK500-2


On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

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Scroll Title
anchorFigure_PWR_PD
titlePower Distribution


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Power-On Sequence

There is no specific power on sequence, after power on the module all regulators will be enable.

Power Rails

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Voltage Monitor Circuit


Power Rail Name

Pmod  J1 Pin

Pmod J2 Pin

DirectionNotes
3.3V6,126,12Input


Technical Specifications

Absolute Maximum Ratings

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titleVoltage Monitor CircuitPS absolute maximum ratings

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Power Rails

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Power Rail Name

Pmod  J1 Pin

Pmod J2 Pin

DirectionNotes

Technical Specifications

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SymbolsDescriptionMinMaxUnit
3.3VInput-0.36.5V
STG_TStorage Temperature-40105°C


Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Description
Scroll Title
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titlePS absolute maximum ratingsRecommended operating conditions.

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Symbols
ParameterMinMax
Unit
Units
V

Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Reference Document
3.3V3.04.2V
OPT_T-40105°CSee ARK500-2 and ARK500-3 Data Sheet
Scroll Title
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titleRecommended operating conditions.
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ParameterMinMaxUnitsReference Document
VSee ???? datasheets.VSee Xilinx ???? datasheet.°CSee Xilinx ???? datasheet.°CSee Xilinx ???? datasheet.


Physical Dimensions

  • Module size: 40 mm × 40 mm.  Please download the assembly diagram for exact numbers.

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titlePhysical Dimension


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Currently Offered Variants 

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REV012019
Scroll Title
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titleHardware Revision History

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DateRevisionChangesDocumentation Link
2019-04-2303
  • R18 and C46 have been removed
  • R22 and C57 have been removed
  • R26 and C67 have been removed
  • R17, R20, R21, R24, R25, R28 have been renamed and the resistance level have been change
  • U1 and U7 have been changed to LM4510SD
REV03
DateRevisionChangesDocumentation Link
2017-03-09REV01
2018-02-2702
  • Schematic has been updated
REV02
REV02
2017-
04
03-
23REV03
0901
  • Initial Release
REV01
REV03