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IssuesDescriptionWorkaroundTo be fixed version
PCB REV01 only: IBERT no CLKPCB REV01 SI5338 is not preprogrammed and SI programming over MCS is disabled by default design and I2C is not connectedLoad test_board bitfile for REV01 and load IBERT design again without power off HW------------

Requirements

Software

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For general structure and of the reference design, see Project Delivery - AMD devices

Design Sources

TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
<design name>/firmware
Vivado Project will be generated by TE Scripts
SDK/HSI<design name>/sw_libAdditional Software Template for SDK/HSI and apps_list.csv with settings for HSI

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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:Vivado/SDK/SDSoCAMD Development Tools#XilinxSoftware-BasicUserGuides

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Generate MCS Firmware (optional):
    1. Create SDK Project with TE Scripts on Vivado TCL: TE::sw_run_sdk
    2. Create "SCU" application
      Note: Select MCS Microblaze and SCU Application
    3. Select Release Built
    4. Regenerate App
  7. (optional) Copy "\\workspace\sdk\scu\Release\scu.elf" into  "\firmware\microblaze_mcs_0\"
  8. Regenerate Vivado Project or Update Bitfile only and "scu.elf"
  9. Copy MCS file with Bitfile into prebuilt folder
    1. Create SDK Project with TE Scripts on Vivado TCL: TE::sw_run_hsi

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Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging

QSPI

  1. Connect JTAG and power on PCB
  2. (if not done) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd" or open with "vivado_open_project_guimode.cmd", if generated.
  3. Type on Vivado Console: TE::pr_program_flash_mcsfile -swapp
    Note: Alternative use SDK or setup Flash on Vivado manually
  4. Reboot (if not done automatically)

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  1. Prepare HW like described on section Programming 70156396
  2. Connect UART USB (most cases same as JTAG)
  3. Power on PCB
    Note: FPGA Loads Bitfile from Flash,MCS Firmware configure SI5338 and starts IBERT.
              Do not reboot, if Bitfile programming over JTAG is used as programming method.
    1. On TE0841 SI5338 has default configuration and reprogramming of SI5338 is optional
  4. LED:
    1. D1 (green) OFF→ MCS SI configuration finished (System Reset is off)

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DateDocument RevisionAuthorsDescription

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dateFormatyyyy-MM-dd

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  • some notes
  • Issue for PCB REV01 only: MCS is disabled on the prebuilt design files

v.5John Hartfiel
  • Design update
  • new assembly variants (PCB REV02)

v.4John Hartfiel
  • Release 2017.4
2018-04-16v.1

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created-user

  • Initial release

All

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