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<!-- General Design description --> |
Design example with Linux and MGT-CLK frequency monitoring over VIO.
Key Features
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<!-- Add Basic Key Features of the design (should be tested) --> |
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PS Interfaces
Activated interfaces:
| Typ | Not |
|---|---|
| DDR | SODIMM, setting depends on used memory |
| QSPI | MIO |
| SD0 | MIO |
| SD1 | MIO |
| I2C0 | MIO |
| PJTAG0 | MIO |
| UART0 | MIO |
| GPIO0 | MIO |
| SWDT0..1 | |
| TTC0..3 | |
| GEM3 | MIO |
| USB0 | MIO/GTP |
| PCIe | MIO/GTP |
| DisplayPort | EMIO/GTP |
Constrains
Basic module constrains
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| 2018-07-20 | v.1 |
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Overview
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