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Excerpt
  • TEBF0808
  • Linux
  • USB
  • ETH
  • PCIe
  • SATA
  • SD
  • I2C
  • RGPIO
  • DP
  • user LED access
  • Modified FSBL for Si5345 Si5338 programming
  • Special FSBL for QSPI Programming

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DateVivadoProject BuiltAuthorsDescription
2018-07-122018.2

TE0803-Starterkit_noprebuilt-vivado_2018.2-build_02_20180713085800.zip
TE0803-Starterkit-vivado_2018.2-build_02_20180713085740.zip

  • Removed- wrong FSBL configuration included
  • New files follow on 24-07-18
John Hartfiel
  • small petalinux changes
  • IO renaming
  • PL Design changes
  • additional notes for FSBL generated with Win SDK
  • changed *.bif
2018-05-172017.4TE0803-Starterkit_noprebuilt-vivado_2017.4-build_09_20180517141540.zip
TE0803-Starterkit-vivado_2017.4-build_09_20180517141523.zip		John Hartfiel
  • new assembly variant
  • solved Linux flash issue
2018-04-112017.4TE0803-Starterkit_noprebuilt-vivado_2017.4-build_07_20180411082139.zip
TE0803-Starterkit-vivado_2017.4-build_07_20180411082116.zip		John Hartfiel
  • bugfix TE0803-01-04EG board part file
2018-02-132017.4TE0803-Starterkit_noprebuilt-vivado_2017.4-build_06_20180213120642.zip
TE0803-Starterkit-vivado_2017.4-build_06_20180213120615.zip		John Hartfiel
  • new assembly variant
2018-02-062017.4TE0803-Starterkit_noprebuilt-vivado_2017.4-build_05_20180206082527.zip
TE0803-Starterkit-vivado_2017.4-build_05_20180206082513.zip		John Hartfiel
  • same CLK for both VIO
2018-02-052017.4TE0803-Starterkit_noprebuilt-vivado_2017.4-build_05_20180205154248.zip
TE0803-Starterkit-vivado_2017.4-build_05_20180205154230.zip		John Hartfiel
  • new assembly variant
  • solved JTAG/Linux issue
2018-01-312017.4TE0803-Starterkit-vivado_2017.4-build_05_20180131124042.zip
TE0803-Starterkit_noprebuilt-vivado_2017.4-build_05_20180131124057.zip		John Hartfiel
  • new assembly variant
2018-01-182017.4TE0803-Starterkit-vivado_2017.4-build_05_20180118164553.zip
TE0803-Starterkit_noprebuilt-vivado_2017.4-build_05_20180118164613.zip		John Hartfiel
  • initial release

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TypeNote
DDR
QSPIMIO
SD0MIO
SD1MIO
CAN0EMIO
I2C0MIO
PJTAG0MIO
UART0MIO
GPIO0MIO
SWDT0..1
TTC0..3
GEM3MIO
USB0MIO/GTP
PCIeMIO/GTP
SATAGTP
DisplayPortEMIO/GTP

Constrains

Basic module constrains

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TE modified 2018.2 FSBL

Changes:

  • Si5345ConfigurationSi5338 Configuration, PCIe Reset over GPIO
    •  see xfsbl_board.c and xfsbl_board.h, xfsbl_main.c
    • Add Si5345-Registersregister_map.h, si5345si5338.c, si5345si5338.h

Note: Remove compiler flags "-Os -flto -ffat-lto-objects" on 2018.2 SDK to generate FSBL

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Xilinx default PMU firmware.

hello_te0803

Hello TE0808 TE0803 is a Xilinx Hello World example as endless loop instead of one console output.

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