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Power supply
DIP-Switches
S1
| Switch | Description |
|---|
| 1 | Boot Mode 0 |
| 2 | Boot Mode 1 |
| 3 | Boot Mode 2 |
| 4 | Boot Mode 3 |
See Zynq -7000 SoC UltraScale+ Device Technical Reference Manual page 166 236 for full boot modes description. Most common modes are
1234| 1 |
|---|
| JTAG Boot Mode | ON | ON | ON | ON |
| Quad-SPI |
OFFONON | ON
S2
| Switch | Description |
|---|
| 1 | SC JTAGEN |
| 2 | EEPROM WP (Write protect) |
| 3 | FPGA PUDC |
| 4 | SC Switch (Reserved for future use) |
LEDs
| LED | Signal | Chip | Pin | Description |
|---|
| Front panel LED 1 (Red) | LED_FP_1 | FPGA U1 | AF15 | PL User defined LED |
| Front panel LED 2 (Green) | LED_FP_2 | FPGA U1 | AG15 | PL User defined LED |
| Front panel LED 3 (Green) | LED_FP_3 | FPGA U1 | AE15 | PL User defined LED |
| Front panel LED 4 (Green) | LED_FP_4 | SC U18 | M4 | Power Good |
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