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changes.mady.by.user Ali Naseri

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New Version 23

changes.mady.by.user John Hartfiel

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Template Revision 2.2 - on construction

TRM Name always "TE Series Name" +TRM, for example "TE0720 TRM"

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titleTEC0850 Control Signals

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Control signal

Switch / Button / LED / PinSignal Schematic Names

Connected to

Functionality

Notes
MAX10 FPGA U1 JTAGENheader J4, pin 2JTAGENMAX10 FPGA U1, bank 1B, pin E5high: MAX 10 JTAG enabled,
floating: MAX 10 JTAG disabled		switch the JTAG pins to user GPIO's if drive this pin to GND
MAX10 FPGA U1 Resetheader J2, pin 10RESETMAX10 FPGA U1, bank 8, pin E7low active reset linealso connected to Reset push button S1
Supply voltage indicatorGreen LED D13.3VDC-DC converter U4indicating 3.3V voltage level-
Configuration DONE indicatorRed LED D10CONF_DONEMAX10 FPGA U1, bank 8, pin C5indicating FPGA configuration completedOFF: configuration completed, ON: FPGA not configured
Reset Push buttonS1RESETMAX10 FPGA U1, bank 8, pin E7low active logic-
User Push buttonS2USER_BTNMAX10 FPGA U1, bank 8, pin E6low active logicavailable to user

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  • initial release

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