| Adjustable Oscillator LTC1799CS5, U10 | OSC_CLK | 8.33MHz / 833.33KHz / 83.33KHz | FPGA SoC bank 2, pin G5 | Frequency is set with signal 'OSC_DIV', which is tied
to FPGA bank 5, pin H9. Following settings are available: FPGA pin H9 ('OSC_DIV') open drain: 8.33MHz
FPGA pin H9 ('OSC_DIV') open drainfloating: 833.33KHz
FPGA pin H9 ('OSC_DIV') pulled to 3.3V: 83.33KHz |