Control signal | Switch / Button / LED / Pin | Signal Schematic Names | Connected to | Functionality | Notes |
|---|
| MAX10 FPGA U1 JTAGEN | header J4, pin 2 | JTAGEN | MAX10 FPGA U1, bank 1B, pin E5 | high: MAX 10 JTAG enabled,
floating: MAX 10 JTAG disabled | switch the JTAG pins to user GPIO's if drive this pin to GND |
| MAX10 FPGA U1 Reset | header J2, pin 10 | RESET | MAX10 FPGA U1, bank 8, pin E7 | low active reset line | also connected to Reset push button S1 |
| Supply voltage indicator | Green LED D1 | 3.3V | DC-DC converter U4 | indicating 3.3V voltage level | - |
| Configuration DONE indicator | Red LED D10 | CONF_DONE | MAX10 FPGA U1, bank 8, pin C5 | indicating FPGA configuration completed | ONOFF: configuration completed, OFFON: FPGA not configured |
| Reset Push button | S1 | RESET | MAX10 FPGA U1, bank 8, pin E7 | low active logic | - |
| User Push button | S2 | USER_BTN | MAX10 FPGA U1, bank 8, pin E6 | low active logic | available to user |