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| Scroll Title |
|---|
| anchor | Table_DRH |
|---|
| title | Design Revision History |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
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| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
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| Date | Vivado | Project Built | Authors | Description |
|---|
| 2018-0911-0506 | 2018.2 | te0803TE0720-SK0803TE0720_zusyszsys_SDSoC-vivado_20172018.12-build_0503_2017091113152220181106093337.zip | Zdenek Pohl, Jiri KadlecJohn Hartfiel | initial release |
|
Release Notes and Know Issues
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| Scroll Title |
|---|
| anchor | Table_HWM |
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| title | Hardware Modules |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
| false |
|---|
| cellHighlighting | true |
|---|
|
| Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
|---|
| te0720-03-2if | 2if | REV02, REV03 | 1GB | 32 |
|
| | te0720-03-2ifc3 | 2if | REV02, REV03 | 1GB | 32 | 2.5 mm connector |
| | te0720-03-2ifc8 | 2if | REV02, REV03 | 1GB | 32 | 32GB eMMC |
| | te0720-03-1qf | 1qf | REV02, REV03 | 1GB | 32 |
|
| | te0720-03-1qfa | 1qf | REV03 | 1GB | 32 |
| Micron instead of Spansion Flash | | te0720-03-1cf | 1cf | REV02, REV03 | 1GB | 32 |
|
| | te0720-03-1cfa | 1cf | REV02, REV03 | 1GB | 32 | 8GB eMMC |
| | te0720-03-2ef | 2ef | REV02, REV03 | 1GB | 32 |
|
| | te0720-03-14s-1c | 14s | REV02, REV03 | 1GB (L) | 32 |
|
| | te0720-03-2ifa | 2if | REV03 | 1GB | 32 |
| Micron instead of Spansion Flash | Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
|---|
|
Design supports following carriers:
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For general structure and of the reference design, see Project Delivery - AMD devices
Design Sources
| Scroll Title |
|---|
| anchor | Table_DS |
|---|
| title | Design sources |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Type | Location | Notes |
|---|
| Vivado | <design name>/block_design
<design name>/constraints
<design name>/ip_lib | Vivado Project will be generated by TE Scripts | | SDK/HSI | <design name>/sw_lib | Additional Software Template for SDK/HSI and apps_list.csv with settings for HSI | | PetaLinux | <design name>/os/petalinux | PetaLinux template with current configuration | | SDSoC | <design name>/../SDSoC_PFM | SDSoC Platform will be generated by TE Scripts or as separate download |
|
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Basic Reference Design and SDSoC Platform projects for Win OS are available on:
Create SDSoC Platform Project
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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.
See also:
This cheaper describes how you can create SDSoC platform project from special Trenz Electronik Vivado projects.
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