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Template Revision 12.0 8 - on construction Design Name always "TE Series Name" + Design name, for example "TEI0001 TE0720 Test Board" |
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NIOS II Design with SDRAM Controller controller, flash memory test and 5 different LED sequences, that can be toggled using the user button.
Refer to http://trenz.org/max1000-info for the current online version of this manual and other available documentation.
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Notes : - Add basic key futures, which can be tested with the design
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- Quartus 18Prime Lite 19.1
- NIOS II
- SPI
- UART
- User Flash memory
- SDRAM memory
- 3-axis Accelerometer
- User LEDs
- User buttons
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Date | Quartus | Project Built | Authors | Description |
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201911111819.1 Lite | TEI0001-test_board_noprebuilt-quartus_ | 182019111110420120200512095852.zip TEI0001-test_board-quartus_ | 182019111110434820200512100037.zip | Thomas Dück |
| | 2019-11-11 | 18.1 | TEI0001-test_board_noprebuilt-quartus_18.1-20191111104201.zip TEI0001-test_board-quartus_18.1-20191111104348.zip | Thomas Dück | | add bash files for | 2019-10-28 | 18.1 | TEI0001-test_board_noprebuilt-quartus_18.1-20191028120819.zip TEI0001-test_board-quartus_18.1-20191028120521.zip | Thomas Dück | - create project with TE scripts
- new assembly variants
| 2019-04-02 | 18.1 | TEI0001-03-08-C8-test_board-quartus_18.1-20190402.zip | Thomas Dück | |
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Release Notes and Know Issues
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Software | Version | Note |
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Quartus Prime Lite | 1819.1 | needed | NIOS II SBT for Eclipse | 18.1 | eclipse | --- | optionalneeded |
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Hardware
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Notes : - list of software which was used to generate the design
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Complete List is available on <design_name>/board_files/*_devices.csv
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Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
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TEI0001-03-08-C8 | 08_C8_8MB | REV02, REV03 | 8 MByte8MByte | 64 MBit64MBit | NA | NA | TEI0001-03-16-C8 | 16_C8_8MB | REV02, REV03 | 8 MByte8MByte | 64 MBit64MBit | NA | NA | TEI0001-03-16-C8A | 16_C8A_32MB | REV03 | 32 MByte32MByte | 64 MBit64MBit | NA | NA | TEI0001-03-16-C8P | 16_C8P_8MB | REV03 | 8 MByte8MByte | 64 MBit64MBit | NA | NA |
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Design supports following carriers:
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Additional Hardware | Notes |
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USB Cable cable for JTAG/UART | Check Carrier Board and Programmer for correct type |
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Type | Location | Notes |
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Quartus | <design_name>/source_files/quartus | Quartus Project project will be generated by TE Scripts | Software | <design_name>/source_files/software | Additional Software software will be generated by TE Scripts |
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File | File-Extension | Description |
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SOPC Information File | *.sopcinfo | File with description of the *.qsys file to create software for the target hardware | Programmer Object File | *.pof | FPGA Configuration Fileconfiguration file | Diverse Reports | --- | Report files in different formats | Software - Application - File | *.elf | Software Application application for NIOS II processor system |
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Download
Reference Design design is only usable with the specified Quartus version. Do never use different Versions versions of Quartus Software software for the same Projectproject.
Reference Design is available on:
Design Flow
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The Trenz Electronic FPGA Reference Designs are TCL-script based projects. Command files for execution will be generated with "_create_win_setupTo create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_createproject_linux_setup.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality
- Open create_project_win.cmd/create_project_linux.sh:
Image Added'Create Project' GUI example - Select Board in "Board selection"
- Click on "Create project" button to create project
- Open _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
- Press 0 and enter to start "Module Selection Guide"
- Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
- (optional for manual changes) Select correct device and Quartus install path on "design_basic_settings.cmd"/ "quartus installation path in "<design_name>/settings/design_basic_settings.sh" and create Quartus project with "quartus_tcl"
Launch
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Note: - Programming and Startup procedure
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Programming
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Check Module and Carrier TRMs for proper HW configuration before you try any design. |
MAX10 Flash
- Connect the Module to USB-Port
- Open create_project_batchmodewin.cmd"/"quartus_create_project_batchmodelinux.sh
- Select correct board in "Board selection"
Launch
Programming
JTAG
Not used on this Example.
MAX10 Flash
- Connect the Module to USB-Port
- Open Quartus project with "quartus_open_existing_project_guimode.cmd"/ "quartus_open_existing_project_guimode.sh"
- Open the Quartus Prime Programmer from Tools → Programmer
- If the Arrow-USB-Blaster is not visible:
- Click "Hardware Setup..."
- Choose at the drop-down menu "Currently selected hardware" Arrow-USB-Blaster [USB0]
- Close "Hardware Setup"
- If the correct configuration file is not set:
- Delete other files
- Click "Add file..."
- Select the correct .pof file (created project file: <design_name>/quartus/output_files/test_board.pof or prebuilt file: <design_name>/prebuilt/<board_part_short_name>/programming_files/*.pof)
- Click "Start"
Usage
- Prepare Hardware like described on section Programming
- Connect UART USB (most cases same as JTAG)
UART
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- Connection Type: Serial
- COM Port: Win OS → see device manager, Linux OS → see dmesg |grep tty
- Speed: 115200
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- Flash test is running
- Click on "Program device" button
- if prebuilt files are available: select "Program prebuilt file"
- using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
- (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
- Click on "Start program device" button
JTAG
Not used on this example.
Usage
- Prepare Hardware like described on section Programming
- Connect UART USB (most cases same as JTAG)
UART
- Open Serial Console (e.g. PuTTY)
- COM Port: Win OS see device manager, Linux OS see dmesg | grep tty (UART is *USB1)
- Speed: 115200
- Press reset button on the module
- Toggle between following modes by pressing user button
- Spirit level
- Winbond SPI flash memory test
- Shift register sequence
- Knightrider sequence
- Case statement sequence
System Design - Quartus
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Image AddedBlock Design - NIOS_test_board.qsys |
Software Design - SDK
Application
Template location: <design_name>/source_files/software/
test_board
Software example to test TEI0001 module.
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Appx. A: Change History and Legal Notices
Document Change History
To get content of older revision revision got to "Change History" of this page and select older document revision number.
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| | 2019-11-11 | v.8 | Thomas Dück | - add bash files for Linux OS
| 2019-10-29 | v.6 | Thomas Dück | - change design to TE scripts
- new variants
| 2019-04-03 | v.4 | Thomas Dück | | -- | all | Page info |
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