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The Trenz Electronic TEP0006 is a Pmod Low Speed Expansion an Ultra96 LS Expansion to Pmod adapter.
Refer to http://trenz.org/tep0006-info for the current online version of this manual and other available documentation.
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- On Board:
- 4x Voltage Level Translators
- 2x Voltag Voltage Regulators
- Interface:
- 1x Ultra96 LS Expansion Header (40 Pins)
- 3x Pmod Connectors
- 3x Jumpers
- Power:
- Dimension:
Block Diagram
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add drawIO object here.
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anchor | Figure_OV_BD |
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title | TEP0006 block diagram |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 57 |
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diagramName | TEP0006_OV_BD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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Main Components
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Scroll Title |
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anchor | Figure_OV_MC |
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title | TEP0006 Main Components |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 35 |
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diagramName | TEP0006_OV_MC |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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- PMod 2x6 Host Socke (PMOD 2) ,J2
- PMod 2x6 Host Socke (PMOD 2) ,J1
- Level Translator (HP_GPIO[0..7]) ,U1
- Level Translator (HP_GPIO[8..15]),U3
- Level Translator PMOD(SPI),U6
- Linear Voltage Regulator,U2
- Jumper,J6-J7
- PMod 2x6 Host Socke (SPI),J4
- GROVE,J5
- Level Translator (GROVE) ,U5
- Jumper (Voltage select ),J10
- SMD Ultra96 LS Expansion Header (40 Pos. (LS Expansion ),J3
Initial Delivery State
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Low Speed Expansion Connector
The SMD Header J3 has 40 pin (20x2) and it is compatible with Ultra96 LS Expansion Connector. You can find General information about GPIO connection to the LS Expansion connector :in the following table.
Scroll Title |
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anchor | Table_SIP_Ultra96 |
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title | Ultra96 LS Expansion information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Schematic | Connected to | Notes |
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HD_GPIO0...7 | Level Translator HP_GPIO[0...7], U1GPIO | GPIO0...7 | HD_GPIO8...15 | Level Translator HP_GPIO[8...15], U3 | GPIOGPIO8...15 | MIO36 -...37 | Level Translator PMOD(SPI)GPIO0-GPIO1 | PS_GPIO_0...1 | MIO38, MIO41...43 | Level Translator PMOD(SPI) | SPI | VCC_PSAUX | Level Translator, U1-U3-U5-U6 Voltage Regulator, U2 | 1.8 V nPOK | 5V | Voltage Regulator, U2 Jumper, J10 | Vin Pull up Voltage |
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Pmod Connectors
The TEP0006 is equipped with three Pmod connectors. Pmod Connectors are the expanded outputs from Ultra96 Board.
Scroll Title |
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anchor | Table_SIP_Pmod |
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title | Pmod Connectors information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Pin | Connected to | Notes |
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Pmod 1, J1 | Pmod 2, J2 | Pmod SPI, J4 |
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Notes |
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1 | PMOD_HD-GPIO0 | PMOD_HD-GPIO8 | SS |
| 2 | PMOD_HD-GPIO1 | PMOD_HD-GPIO9 | MOSI |
| 3 | PMOD_HD-GPIO2 | PMOD_HD-GPIO10 | MISO |
| 4 | PMOD_HD-GPIO3 | PMOD_HD-GPIO11 | SCK |
| 5 | GND | GND | GND |
| 6 | 3.3 V | 3.3 V | 3.3 V |
| 7 | PMOD_HD-GPIO4 | PMOD_HD-GPIO12 | INIT |
| 8 | PMOD_HD-GPIO5 | PMOD_HD-GPIO13 | RESET |
| 9 | PMOD_HD-GPIO6 | PMOD_HD-GPIO14 | Not Connected |
| 10 | PMOD_HD-GPIO7 | PMOD_HD-GPIO15 | Not Connected |
| 11 | GND | GND | GND |
| 12 | 3.3 V | 3.3 V | 3.3 V |
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Jumpers
Scroll Title |
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anchor | Table_SIP_Pmod |
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title | Pmod Connectors information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Functionality | Connection Between | Notes |
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J6 | HD_GPIO_15 VCC_PSAUX | J7 | Level Translator U3 and U5 | If you install the jumper HD_GPIO_15 | VCC_PSAUXwill be driven through Level Translator (U5) and Grove (J5) otherwise it goes to Level Translator (U3). | J7 | HD_GPIO_11 | Level Translator U3 and U5 | If you put the jumper HD_GPIO_11 will be driven through Level Translator (U5) and Grove (J5) otherwise it goes to Level Translator (U3). | J10 | Voltage select | SDA 5 V, 3.3 V SDA can be either 5 V or 3.3 V | Pull up Voltage |
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On-board Peripherals
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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In 'Power and Power-on Sequence' section there are three important digrams which must be drawn: - Power on-sequence
- Power distribution
- Voltage monitoring circuit
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Power Supply
Power supply with minimum current capability of 1 A for system startup is recommendedis supplied by Ultra96 Board through SMD Header J3.
Power Consumption
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anchor | Table_PWR_PC |
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title | Power Consumption |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Power Input Pin | Typical Current |
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5V | TBD | VCC_PSAUX | VIN | TBD | * |
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* TBD - To Be Determined
Power Distribution Dependencies
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anchor | Figure_PWR_PD |
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title | Power Distribution |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 2 |
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diagramName | TEP0006_PWR_PD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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Image Modified |
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Power-On Sequence
There is no specific power on sequence, after power on the Ultra96 Board all electrical components on TEP0006 will be enabled.
Power Rails
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anchor | Table_PWR_PR |
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title | Module power rails. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Power Rail Name | LS Expansion Connector Pin | Direction | Notes |
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+5V | 37 | Input | Supplied by Ultra96 | VCC_PSAUX | 35 | InputOutput | Supplied by Ultra96 |
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Technical Specifications
Absolute Maximum Ratings
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Description | Min | Max | Unit | Vin | Input Supply Voltage | 1.7 | 5.5 | V |
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T_STG | Storage Temperature | -55 | 150 | °C |
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anchor | Table_TS_ROC |
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title | Recommended operating conditions. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Parameter | Min | Max | Units | Reference Document | Vin | 4.5 | 5.5 | V | See MAX8902BATA+T datasheet. |
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T_OPT | -40 | +85 | °C |
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Physical Dimensions
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anchor | Figure_RV_HRN |
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title | Board hardware revision number. |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 34 |
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diagramName | TEP0006_RV_HRN |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 188180 |
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Scroll Only |
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Document Change History
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Scroll Title |
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anchor | Table_RH_DCH |
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title | Document change history. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Contributor | Description| |
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Page info |
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infoType | Modified date |
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dateFormat | yyyy-MM-dd |
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type | Flat |
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| Page info |
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infoType | Current version |
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prefix | v. |
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type | Flat |
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showVersions | false |
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| Page info |
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infoType | Modified by |
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type | Flat |
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showVersions | false |
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infoType | Modified users |
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type | Flat |
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showVersions | false |
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