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The Trenz Electronic TEP0006 is a Pmod Ultra96 LS Expansion adapter.
Refer to http://trenz.org/tep0006-info for the current online version of this manual and other available documentation.
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Notes : - For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
Ultra96 LS Expansion
General information about GPIO connection to the Ultra96 LS Expansion FPGA bank number and number of I/O signals connected to the B2B connector:
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| anchor | Table_SIP_B2BUltra96 |
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| title | General PL I/O to B2B connectors Ultra96 LS Expansion information |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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| Schematic | Connected to | Notes |
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| HD_GPIO0...7 | Level Translator HP_GPIO[0...7], U1 | GPIO | HD_GPIO8...15 | Level Translator HP_GPIO[8...15], U3 | GPIO | | MIO36-37 | Level Translator PMOD(SPI) | GPIO0-GPIO1 | | MIO38, MIO41...43 | Level Translator PMOD(SPI) | SPI | | VCC_PSAUX | Level Translator, U1-U3-U5-U6 Voltage Regulator, U2 | 1.8 V | | 5V | Voltage Regulator, U2 Jumper, J10 |
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Pmod Connectors
JTAG access to the TExxxx SoM through B2B connector JMX.
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| anchor | Table_SIP_JTG |
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| title | JTAG pins connection |
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| Pmod | | title | Pmod Connectors information |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Schematic | Connected to | Notes |
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| HD_GPIO0...7 | Level Translator HP_GPIO[0...7], U1 | GPIO | HD_GPIO8...15 | Level Translator HP_GPIO[8...15], U3 | GPIO | | MIO36-37 | Level Translator PMOD(SPI) | GPIO0-GPIO1 | | MIO38, MIO41...43 | Level Translator PMOD(SPI) | SPI | | VCC_PSAUX | Level Translator, U1-U3-U5-U6 Voltage Regulator, U2 | 1.8 V | | 5V | Voltage Regulator, U2 Jumper, J10 |
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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style | widths | | sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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JTAG Signal | B2B Connector |
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TMS | TDI | TDO | TCK | JTAG_EN
MIO Pins
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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic. Example: | MIO Pin | Connected to | B2B | Notes |
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| MIO12...14 | SPI_CS , SPI_DQ0... SPI_DQ3 SPI_SCK | J2 | QSPI |
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