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  • On Board:
    • 4x Voltage Level Translators
    • 2x Voltag Voltage Regulators
  • Interface:
    • 1x Ultra96 LS Expansion Header (40 Pins)
    • 3x Pmod Connectors
    • 3x Jumpers
  • Power:
    • 5V
    • VCC_PSAUX
  • Dimension: 
    • 85 mm x 17 mm

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Scroll Title
anchorFigure_OV_BD
titleTEP0006 block diagram


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Main Components

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  1. PMod 2x6 Host Socke (PMOD 2)  ,J2
  2. PMod 2x6 Host Socke (PMOD 2) ,J1
  3. Level Translator (HP_GPIO[0..7]) ,U1
  4. Level Translator (HP_GPIO[8..15]),U3
  5. Level Translator PMOD(SPI),U6
  6. Linear Voltage Regulator,U2
  7. Jumper,J6-J7
  8. PMod 2x6 Host Socke (SPI),J4
  9. GROVE,J5
  10. Level Translator (GROVE) ,U5
  11. Jumper (Voltage select ),J10
  12. SMD Ultra96 LS Expansion Header (40 Pos. (LS Expansion ),J3

Initial Delivery State

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Low Speed Expansion Connector

The SMD Header J3 has 40 pin (20x2) and it is compatible with Ultra96 LS Expansion Connector.
is specified. General information about GPIO connection to the LS Expansion connector:

Scroll Title
anchorTable_SIP_Ultra96
titleUltra96 LS Expansion information

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SchematicConnected toNotes
HD_GPIO0...7Level Translator HP_GPIO[0...7], U1GPIOGPIO0...7

HD_GPIO8...15

Level Translator HP_GPIO[8...15], U3GPIOGPIO8...15

MIO36

-

...37

Level Translator PMOD(SPI)GPIO0-GPIO1PS_GPIO_0...1
MIO38, MIO41...43Level Translator PMOD(SPI)SPI
VCC_PSAUX

Level Translator, U1-U3-U5-U6

Voltage Regulator, U2

1.8 V

nPOK

5V

Voltage Regulator, U2

Jumper, J10, J10

Vin

Pull up Voltage


Pmod Connectors

The TEP0006 is equipped with three Pmod connectors. Pmod Connectors are the expanded outputs from Ultra96 Board. 

Scroll Title
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titlePmod Connectors information

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Pin

Connected to

Notes

Pmod 1, J1Pmod 2, J2 Pmod SPI, J4
Notes
1PMOD_HD-GPIO0PMOD_HD-GPIO8SS
2PMOD_HD-GPIO1PMOD_HD-GPIO9MOSI
3PMOD_HD-GPIO2PMOD_HD-GPIO10MISO
4PMOD_HD-GPIO3PMOD_HD-GPIO11SCK
5GNDGNDGND
63.3 V3.3 V3.3 V
7PMOD_HD-GPIO4PMOD_HD-GPIO12INIT
8PMOD_HD-GPIO5PMOD_HD-GPIO13RESET
9PMOD_HD-GPIO6PMOD_HD-GPIO14Not Connected
10PMOD_HD-GPIO7PMOD_HD-GPIO15Not Connected
11GNDGNDGND
123.3 V3.3 V3.3 V


Jumpers

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titlePmod Connectors information

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DesignatorFunctionalityConnection BetweenNotes

J6

HD_GPIO_15

Level Translator U3 and U5

If you put install the jumper HD_GPIO_15 will be driven through Level Translator (U5) and then Grove (J5) otherwise it goes to Level Translator (U3).
J7HD_GPIO_11

Level Translator U3 and U5

If you put the jumper HD_GPIO_11 will be driven through Level Translator (U5) and then Grove (J5) otherwise it goes to Level Translator (U3).
J10Voltage select

5 V, 3.3 V

Pull up Voltage


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Page properties
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idComments

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

Power supply with minimum current capability of 1 A for system startup is recommendedis supplied by Ultra96 Board through SMD Header J3.

Power Consumption

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titlePower Consumption

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-
Power Input PinTypical Current-
5VTBD
VCC_PSAUXTBD


* TBD - To Be Determined

Power Distribution Dependencies

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There is no specific power on sequence, after power on the Ultra96 Board all electrical components on TEP0006 will be enabled.

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Scroll Title
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titleModule power rails.

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Power Rail Name

LS Expansion Connector Pin

DirectionNotes
+5V37InputComes from Supplied by Ultra96
VCC_PSAUX35InputComes from Ultra96Supplied by Ultra96


Technical Specifications

Absolute Maximum Ratings

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