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Scroll Title
anchorTable_SIP_JTG
titleJTAG pins connection

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JTAG Signal

B2B Connector

Pin headerNotes
TMSJ9-55J10-5pull up
TDIJ9-51J10-9pull up
TDOJ9-53J10-3-
TCK

J9-59

J10-1pull down
JTAGEN J9-57-high for enable JTAG port of CPLD, low for user I/Os, pull up
UART_RX-J10-7CPLD Firmware dependent, see Firmware
UART_TX-J10-8CPLD Firmware dependent, see Firmware
RST-J10-6CPLD Firmware dependent, see Firmware
+3.3V_DJ9-4, J9-9J10-4-
DGNDseveral, see 91000551 CRUVIJ10-2, J10-10-


Sensor Interface

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For the connection to a control unit, the CRUVI interface is implemented. One high speed connector J9 is assembled. The connectors are further described in section B2B Connectors. The connection of the signals and the voltage levels is described in the CPLD section.

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titleCRUVI signals

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Signal

 Connector - Pin
DGND

J9-12, J9-18, J9-24, J9-30, J9-42, J9-48, J9-54, J9-13, J9-19, J9-25, J9-31, J9-37, J9-43, J9-49

+3.3V_D

J9-4, J9-9
+5.0V_DJ9-60
VADJJ9-36
A0_PJ9-14
A0_NJ9-16
A1_P

J9-20

A1_NJ9-22
A2_PJ9-26
A2_NJ9-28
A3_PJ9-32
A3_NJ9-34
A4_PJ9-38
A4_NJ9-40
A5_PJ9-44
A5_NJ9-46
B0_PJ9-15
B0_NJ9-17
B1_PJ9-21
B1_NJ9-23
B2_PJ9-27
B2_NJ9-29
B3_PJ9-33
B3_NJ9-35
B4_PJ9-39839
B4_NJ9-41
B5_PJ9-45
B5_NJ9-47
HSIOJ9-2
HSOJ9-6
RESETJ9-8
HSIJ9-10

TDI

J9-51
TDOJ9-53
TMSJ9-55
JTAGENJ9-57
TCKJ9-59
SMB_ALERTJ9-3
SMB_SDAJ9-5
SMB_SCLJ9-7
REFCLKJ9-11


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