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LEDs

Scroll Title
anchor Table_OBP_I2C_RTCLED title I2C Address for RTCOn-board LEDs
Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true
MIO Pin	I2C Address	Designator	Notes

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Designator Color Connected to Active Level Note

Clock Sources

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anchor Table_OBP_EEPCLK title I2C EEPROM interface MIOs and pinsOsillators
Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true
MIO Pin	Schematic	U?? Pin	Notes
Scroll Title
anchor Table_OBP_I2C_EEPROM title I2C address for EEPROM
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orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style	widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true
MIO Pin	I2C Address	Designator	Notes

LEDs

Designator Description Frequency Note MHz MHz KHz

Power and Power-On Sequence

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hidden true id Comments
In 'Power and Power-on Sequence' section there are three important digrams which must be drawn: Power on-sequence Power distribution Voltage monitoring circuit Note For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

Scroll Title
anchor Table_OBPPWR_LEDPC title On-board LEDsPower Consumption
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Designator	Color	Connected to	Active Level	Note

DDR3 SDRAM

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hidden true id Comments
Notes : Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.

• Part number: 
• Supply voltage:
• Speed: 
• NOR Flash
• Temperature: 

Ethernet

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anchor	Table_OBP_ETH
title	Ethernet PHY to Zynq SoC connections

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Power Input Pin Typical Current VIN TBD*

* TBD - To Be Determined

Power Distribution Dependencies

Scroll Title
anchor Figure_PWR_PD title Power Distribution
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Power-On Sequence

Scroll Title
anchor Figure_PWR_PS title Power Sequency
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Voltage Monitor Circuit

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anchor TableFigure_OBPPWR_CANVMC title CAN Tranciever interface MIOsVoltage Monitor Circuit
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Power Rails

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anchor Table_PWR_PR title Module power rails.
tablelayout Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true
Bank	Schematic	U?? Pin	Notes
D-Tx	Driver Input	R-Rx	Reciever Output

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Power Rail Name Pmod  J1 Pin Pmod J2 Pin Direction Notes

Bank Voltages

Scroll Title
anchor Table_OBPPWR_CLKBV title OsillatorsZynq SoC bank voltages.
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Designator	Description	Frequency	Note
MHz	MHz	KHz

Power and Power-On Sequence

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hidden	true
id	Comments

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

• Power on-sequence
• Power distribution
• Voltage monitoring circuit

Note
For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

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anchor	Table_PWR_PC
title	Power Consumption

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* TBD - To Be Determined

Power Distribution Dependencies

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anchor	Figure_PWR_PD
title	Power Distribution

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Power-On Sequence

...

anchor	Figure_PWR_PS
title	Power Sequency

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Voltage Monitor Circuit

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anchor	Figure_PWR_VMC
title	Voltage Monitor Circuit

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Power Rails

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anchor	Table_PWR_PR
title	Module power rails.

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B2B Connector

JM1 Pin

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B2B Connector

JM2 Pin

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B2B Connector

JM3 Pin

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Bank Voltages

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anchor	Table_PWR_BV
title	Zynq SoC bank voltages.

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Bank          

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Voltage

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hidden	true
id	Comments

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use "include page" macro and link to the general B2B connector page of the module series,

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? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)

true Bank           Schematic Name Voltage Notes

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Technical Specifications

Absolute Maximum Ratings

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Scroll Title
anchor Table_TS_ROC title Recommended operating conditions.
Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true cellHighlighting true See Xilinx ???? datasheet. Parameter Min Max Units Reference Document Parameter Min Max Units Reference Document V See ???? datasheets. V See Xilinx ???? datasheet. V See Xilinx ???? datasheet. V See Xilinx ???? datasheet. V V See Xilinx ???? datasheetdatasheets. V See Xilinx ???? datasheet. °C See Xilinx ???? datasheet. °C See Xilinx ???? datasheet.

Physical Dimensions

• Module size: ?? 40 mm × ?? 40 mm.  Please download the assembly diagram for exact numbers.

• Mating height with standard connectors: ? mm.

PCB thickness: ?? 1.59 mm.

Page properties
hidden true id Comments
In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM. For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below: https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF Note For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

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