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Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board"

DateVersionChangesAuthor




2021-06-151.2
  • table of content view
  • template history
  • placed a horizontal separation line under each chapter heading
  • replaced <design name> by <project folder>
  • update 19.x to 20.x
JH,TD
2020-11-241.1
  • add fix table of content
  • add table size as macro
JH
--1.0----


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Important General Note:

  • Export PDF to download, if vivado revision is changed!

  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template (note: inner scroll ignore/only only with drawIO object):

        Scroll Title
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        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, use


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables
        • Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)

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        ExampleComment
        12



  • ...

Overview

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Notes :

Quartus Design with NIOS II and software example "simple_socket_server" and "hello_tei0006".

Refer to http://trenz.org/tei0006-info for the current online version of this manual and other available documentation.

Key Features

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Notes :

  • Add basic key futures, which can be tested with the design


Excerpt
  • Quartus 20.4 Pro
  • NIOS II
  • UART
  • ETH
  • QSPI flash memory
  • DDR3 memory
  • User LED

Revision History

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Notes :

  • add every update file on the download
  • add design changes on description


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DateQuartusProject BuiltAuthorsDescription
2021-06-1520.4 Pro

TEI0006-test_board_noprebuilt-quartus_20.4.0-20210615142627.zip

TEI0006-test_board-quartus_20.4.0-20210615142455.zip

Thomas Dück
  • update to Quartus Prime Pro 20.4
  • TE scripts update
  • new assembly variants
2020-10-1919.4 Pro

TEI0006-test_board_noprebuilt-quartus_19.4.0-20201019101920.zip

TEI0006-test_board-quartus_19.4.0-20201019101840.zip

Thomas Dück
  • script update
  • bugfixes
2020-05-1319.4 Pro

TEI0006-test_board_noprebuilt-quartus_19.4.0-20200513124953.zip

TEI0006-test_board-quartus_19.4.0-20200513125247.zip

Thomas Dück
  • TE scripts update
2020-03-0919.4 Pro

TEI0006-test_board-quartus_19.4-20200309134933.zip
TEI0006-test_board_noprebuilt-quartus_19.4-20200309135555.zip

Thomas Dück
  • initial release


Release Notes and Know Issues

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Notes :
  • add known Design issues and general notes for the current revision
  • do not delete known issue, add fixed version time stamp if  issue fixed


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titleKnown Issues

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IssuesDescriptionWorkaroundTo be fixed version
No known issues---------


Requirements

Software

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Notes :

  • list of software which was used to generate the design


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SoftwareVersionNote
Quartus Prime Pro20.4needed
NIOS II SBT for Eclipse---optional


Hardware

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Notes :

  • list of software which was used to generate the design
  • mark the module and carrier board, which was used tested with an *

Complete List is available on <project folder>/board_files/*_devices.csv

Design supports following modules:

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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashEMMCOthersNotes
TEI0006-03-220-5I*220_5I_2GBREV03|REV02|REV012GB128MBNANANA
TEI0006-03-APC13-RAPC13_R_128MBREV03128MB128MBNANAwithout ETH PHY
TEI0006-03-ANC13-RANC13_R_128MBREV03128MB128MBNANAwithout ETH PHY
TEI0006-03-ALC13-RALC13_R_128MBREV03128MB128MBNANAwithout ETH PHY

*used as reference


Design supports following carriers:

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Carrier ModelNotes
TEIB0006*

*used as reference

Additional HW Requirements:

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Additional HardwareNotes
USB cable for JTAG/UARTCheck Carrier Board and Programmer for correct type
RJ45 ethernet cableconnect carrier board to network


Content

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Notes :

  • content of the zip file

For general structure and of the reference design, see Project Delivery - Intel devices

Design Sources

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TypeLocationNotes
Quartus

<project folder>/source_files/quartus

<project folder>/source_files/<Board Part Short Name>/quartus

Quartus project will be generated by TE Scripts

optional, source files for specific assembly variants

Software<project folder>/source_files/softwareAdditional software will be generated by TE Scripts


Prebuilt

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Notes :

  • prebuilt files
  • Template Table:

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      File

      File-Extension

      Description

      SOPC Information File*.sopcinfoFile with description of the .qsys file to create software for the target hardware
      SRAM Object File*.sofRam configuration file
      Programmer Object File*.pofFPGA configuration file
      JTAG indirect configuration file*.jicFlash configuration file
      Diverse Reports---Report files in different formats
      Software-Application-File*.elfSoftware application for NIOS II processor system




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File

File-Extension

Description

SOPC Information File*.sopcinfoFile with description of the .qsys file to create software for the target hardware
SRAM Object File*.sofRam configuration file
JTAG indirect configuration file*.jicFlash configuration file
Diverse Reports---Report files in different formats
Software-Application-File*.elfSoftware application for NIOS II processor system


Download

Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.

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Reference Design is available on:

Design Flow

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Notes :
  • Basic Design Steps

  • Add/ Remove project specific description


Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:


The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

  1. Open create_project_win.cmd/create_project_linux.sh:
    'Create Project' GUI example
  2. Select Board in "Board selection"
  3. Click on "Create project" button to create project
    1. (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"

Launch

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Note:

  • Programming and Startup procedure

Programming

Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

QSPI

  1. Connect JTAG and power on carrier with module
  2. Open create_project_win.cmd/create_project_linux.sh
  3. Select correct board in "Board selection"
  4. Click on "Program device" button
    1. if prebuilt files are available: select "Program prebuilt file"
    2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
    3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
  5. Click on "Start program device" button

JTAG

Not used on this Example.

Usage

  1. Prepare HW like described on section Programming
  2. Connect UART USB (most cases same as JTAG)
  3. Connect your board to the network
  4. Power on PCB

UART

  1. Open Serial Console (e.g. PuTTY)
    1. COM Port: Win OS see device manager, Linux OS see  dmesg | grep tty  (UART is *USB1)
    2. Speed: 11520115200
    3. Select "Implicit CR in every LF" in category "Terminal"
  2. Press reset button
  3. Console output depends on used Software project, see Software Design - SDK#Application

System Design - Quartus

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Note:

  • Description of Block Design - Project, Block Design - Platform Desginer, ... Block Design Pictures from Export...

Block Design

The block designs may differ depending on the assembly variant.

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Block Design - NIOS_test_board.qsys

Software Design - SDK

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Note:
  • optional chapter separate

  • sections for different apps

Application

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----------------------------------------------------------

General Example:

hello_tei0006

Hello TEI0006 is a Hello World example as endless loop instead of one console output.

Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/

hello_tei0006

Hello TEI0006 is a Hello World example as endless loop instead of one console output.

simple_socket_server

Software example "Simple Socket Server" from eclipse (modified source files for TEI0006 board).

  • If DHCP Server is not available:
    1. Open software project in sdk gui (e.g. NIOS II SBT for Eclipse) and change predefined IP address in "simple_socket_server.h", rebuild software project and download *.elf file to the device.
    2. Open command shell and enter "telnet <ip_address> 30" to connect to simple socket server

Appx. A: Change History and Legal Notices

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Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports


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DateDocument Revision

Authors

Description

Page info
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dateFormatyyyy-MM-dd

Page info
infoTypeCurrent version
dateFormatyyyy-MM-dd
prefixv.
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Page info
infoTypeModified by
typeFlat

  • update to Quartus Prime Pro 20.4
  • new assembly variants
  • document style update
  • script update
2020-10-19v.6Thomas Dück
  • script update
  • bugfixes
2020-05-13v.5Thomas Dück
  • Design files update
2020-03-18v.4Thomas Dück
  • initial release 19.4
--all

Page info
infoTypeModified users
dateFormatyyyy-MM-dd
typeFlat

--


Legal Notices

Include Page
IN:Legal Notices
IN:Legal Notices




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Table of contents

Table of Contents
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