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Template Revision 21.8 0 - on construction

Design Name always "TE Series Name" + Design name, for example "TE0720 TEI0006 Test Board"


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030920200309134933_noprebuilt20200309135555
DateQuartusProject BuiltAuthorsDescription
2020-0510-131919.4 Pro

TEI0006-test_board_noprebuilt-quartus_19.4.0-2020051312495320201019101920.zip

TEI0006-test_board-quartus_19.4.0-2020051312524720201019101840.zip

Thomas Dück
  • TE scripts script update
  • bugfixes
2020-05-1319.4 Pro

TEI0006-test_board_noprebuilt-quartus_19.4.0-

20200513124953.zip

TEI0006-test_board

-quartus_19.4.0-

20200513125247.zip

Thomas Dück
  • initial release

Release Notes and Know Issues

  • TE scripts update
2020-03-0919.4 Pro

TEI0006-test_board-quartus_19.4-20200309134933.zip
TEI0006-test_board_noprebuilt-quartus_19.4-20200309135555.zip

Thomas Dück
  • initial release


Release Notes and Know Issues

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Notes :
  • add known Design issues and general notes for the current revision
  • do not delete known issue, add fixed version time stamp if  issue fixed

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Notes :

  • prebuilt files
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      File

      File-Extension

      Description

      BIF-SOPC Information File*.bifsopcinfoFile with description to generate Bin-Fileof the .qsys file to create software for the target hardware
      SRAM Object BIN- File*.binFlash Configuration File with Boot-Image (Zynq-FPGAs)sofRam configuration file
      Programmer Object BIT- File*.bitpofFPGA (PL Part) Configuration FileDebugProbes-Fileconfiguration file
      JTAG indirect configuration file*.ltxDefinition File for Vivado/Vivado Labtools Debugging InterfacejicFlash configuration file

      Debian SD-Image

      *.img

      Debian Image for SD-Card
      Diverse Reports---Report files in different formats
      HardwareSoftware-PlatformApplication-Specification-FilesFile*.xsaExported Vivado Hardware Specification for Vitis and PetaLinux
      LabTools Project-File*.lprVivado Labtools Project File

      MCS-File

      *.mcs

      Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

      MMI-File

      *.mmi

      File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)

      OS-Image*.ubImage with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
      Software-Application-File*.elfSoftware Application for Zynq or MicroBlaze Processor Systems

      SREC-File

      *.srec

      Converted Software Application for MicroBlaze Processor Systems

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File

File-Extension

Description

SOPC Information File*.sopcinfoFile with description of the .qsys file to create software for the target hardware
SRAM Object File*.sofRam configuration file
JTAG indirect configuration file*.jicFlash configuration file
Diverse Reports---Report files in different formats
Software-Application-File*.elfSoftware application for NIOS II processor system

Download

Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.

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Reference Design is available on:

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    • elfSoftware application for NIOS II processor system




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File

File-Extension

Description

SOPC Information File*.sopcinfoFile with description of the .qsys file to create software for the target hardware
SRAM Object File*.sofRam configuration file
JTAG indirect configuration file*.jicFlash configuration file
Diverse Reports---Report files in different formats
Software-Application-File*.elfSoftware application for NIOS II processor system


Download

Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.

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Reference Design is available on:

Design Flow

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Notes :
  • Basic Design Steps

  • Add/ Remove project specific description


Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunch.

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:


The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

  1. Open create_project_win.cmd/create_project_linux.sh:
    'Create Project' GUI exampleImage Added
  2. Select Board in "Board selection"
  3. Click on "Create project" button to create project
    1. (optional for manual changes) Select correct quartus installation path in "<design_name>/settings/design_basic_settings.tcl"

Launch

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Notes :
  • Basic Design Steps

  • Add/ Remove project specific description

Note

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunch.

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:

...

Note:

  • Programming and Startup procedure

Programming

Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

QSPI

  1. Connect JTAG and power on carrier with module
  2. Open create_project_win.cmd

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  1. /create_project_linux.sh

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  1. Select correct board in "Board selection"
  2. Click on "Program device" button
    1. if prebuilt files are available: select "Program prebuilt file"
    2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
    3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
  3. Click on "Start program device" button

JTAG

Not used on this Example.

Usage

  1. Prepare HW like described on section 94490007
  2. Connect UART USB (most cases same as JTAG)
  3. Connect your board to the network
  4. Power on PCB

UART

  1. Open Serial Console (e.g. PuTTY)
    1. COM Port: Win OS see device manager, Linux OS see  dmesg | grep tty  (UART is *USB1)
    2. Speed: 11520
    3. Select "Implicit CR in every LF" in category "Terminal"
  2. Press reset button
  3. Simple Socket Server is starting up. Follow instructions on shell.
    1. If dhcp server is not available: open software project in sdk gui (e.g. NIOS II SBT for Eclipse) and change predefined IP address in "simple_socket_server.h", rebuild software project and download *.elf file to the device.
    2. Open command shell and enter "telnet <ip_address> 30" to connect to simple socket server

System Design - Quartus

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Note:

  • Description of Block Design - Project, Block Design - Platform Desginer, ... Block Design Pictures from Export...

Block Design

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Block Design - test_board.bdfImage Added


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titleBlock Design - Platform Designer
Block Design - NIOS_test_board.qsysImage Added

Software Design - SDK

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

  1. Open create_project_win.cmd/create_project_linux.sh:
    'Create Project' GUI exampleImage Removed
  2. Select Board in "Board selection"
  3. Click on "Create project" button to create project
    1. (optional for manual changes) Select correct quartus installation path in "<design_name>/settings/design_basic_settings.tcl"

Launch

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Note:

  • Programming and Startup procedure

Programming

Note

Check Module and Carrier TRMs for proper HW configuration before you try any design.

QSPI

  1. Connect JTAG and power on carrier with module
  2. Open create_project_win.cmd/create_project_linux.sh
  3. Select correct board in "Board selection"
  4. Click on "Program device" button
    1. if prebuilt files are available: select "Program prebuilt file"
    2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
    3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
  5. Click on "Start program device" button

JTAG

Not used on this Example.

Usage

  1. Prepare HW like described on section Programming
  2. Connect UART USB (most cases same as JTAG)
  3. Connect your board to the network
  4. Power on PCB

UART

  1. Open Serial Console (e.g. PuTTY)
    1. COM Port: Win OS see device manager, Linux OS see  dmesg | grep tty  (UART is *USB1)
    2. Speed: 11520
    3. Select "Implicit CR in every LF" in category "Terminal"
  2. Press reset button
  3. Simple Socket Server is starting up. Follow instructions on shell.
    1. If dhcp server is not available: open software project in sdk gui (e.g. NIOS II SBT for Eclipse) and change predefined IP address in "simple_socket_server.h", rebuild software project and download *.elf file to the device.
    2. Open command shell and enter "telnet <ip_address> 30" to connect to simple socket server

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Block Design

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titleBlock Design - Platform Designer
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Software Design - SDK

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Note:
  • optional chapter separate

  • sections for different apps

Application


  • optional chapter separate

  • sections for different apps

Application

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----------------------------------------------------------

General Example:

hello_tei0006

Hello TEI0006 is a Quartus Hello World example as endless loop instead of one console output.

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Template location: <design_name>/source_files/software/

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titleDocument change history.

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DateDocument Revision

Authors

Description

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infoTypeCurrent version
dateFormatyyyy-MM-dd
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infoTypeModified by
typeFlat

  • script update
  • bugfixes
2020-05-13v.5Thomas Dück
  • Design files update
2020-03-18v.4Thomas Dück
  • initial release 19.4
--all

Page info
infoTypeModified users
dateFormatyyyy-MM-dd
typeFlat

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