- Created by Mohsen Chamanbaz, last modified on 03 04, 2024
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TEB2000 with TEM0007
Overview
Board Overview
Number | Note |
---|---|
1 | J14- Ethernet interface |
2 | J5,J8,J9,J10- Bank voltage adjustment |
3 | JB1,JB2,JB3- B2B connector |
4 | J3- SD card socket |
5 | J21- UART0 socket |
6 | J4- UART1 socket |
7 | J13- 5V voltage input |
8 | J12- USB stick socket |
9 | S6- Reset button (SRST) (Soft reset) |
10 | S1- Reset button ( Hard reset) |
11 | S2- Dip Switch |
12 | U4- CPLD Chip |
Power supply
Single 5V power supply with minimum current capability of 1.5A is recommended to power on the board.
DIP-Switches and Push Buttons
There is two switch (S1 and S6) which is connected to RESET signals, these reset the system entirely. The S6 is a soft reset buttom and S1 create a reset signal via hardware.
Signal | Designator | Connected to | Active Level | Description |
---|---|---|---|---|
SRST | S6 | B2B JB2 pin 56 | Active low | |
S1 | S1 | CPLD chip pin 114 | Active low |
Dip Switch S2 | Signal | Position ON | Position OFF | Connected to | Description |
---|---|---|---|---|---|
S2-1 | MIO0 | MODE pin ( B2B JB1 pin 31 set to '0') | MODE pin ( B2B JB1 pin 31 set to '1') | CPLD Chip pin 94 / B2B JB1 pin 88 | |
S2-2 | JTAGEN | Module FPGA JTAG access ( if S2-3 ON) | Module CPLD JTAG access (if S2-3 ON) | CPLD chip pin 120 | |
S2-3 | CM0 | Module FPGA/CPLD JTAG access (depends on S2-3) | Carrier CPLD JTAG access | CPLD chip pin 76 | |
S2-4 | CM1 | PGOOD signal set to '0' | PGOOD signal set to '1' | CPLD chip pin 75 |
There is no DIPs on TEM0007 module.
Jumpers
Designator | Connected to | Default set to | Note |
---|---|---|---|
J5 | VCCIOA | M1.8VOUT | It can be set to both 1.8V or 3.3V for TEM0007 module. |
J8 | VCCIOB | M1.8VOUT | May be set to either 3.3V or 1.8V. If set to 1.8V --> VDDAUX1 (TP5) = 2.5V±3% |
J9 | VCCIOC | M1.8VOUT | It can be set to both 1.8V or 3.3V for TEM0007 module. |
J10 | VCCIOD | M1.8VOUT | Important note: Only set to 1.8V for TEM0007 module. |
LEDs
There are six LEDs which can be used for variant purposes.
LED | Designator | Color | LED Status | Condition | Description |
---|---|---|---|---|---|
ULED1 | D1 | Red | Fast blink yellow | Access to CPLD of module ( CM0 = '1') | |
Connected to UART1_RX | Otherwise | ||||
ULED2 | D2 | Green | Fast blink green | Access to CPLD of module ( CM0 = '1') | |
Connected to UART1_TX | Otherwise | ||||
FL_0 | D3 | Red | Fast blink yellow | PGOOD = '0' ( CM1 = '1' ) | |
Connected to UART0_RX | Otherwise | ||||
FL_1 | D4 | Green | Fast blink green | PGOOD = '0' ( CM1 = '1' ) | |
Connected to UART0_TX | Otherwise |
LED | Designator | LED Status | Condition | Description |
---|---|---|---|---|
PHY_LED1 (Green LED Anode, Yellow LED Cathode) / PHY_LED1R (Green LED Cathode, Yellow LED Anode) | J14B* | Fast blink yellow | NOSEQ = '0' and MIO0 = '0' | |
Slow blink yellow | NOSEQ = '0' and MIO0 = '1' | |||
Fast blink yellow green | NOSEQ = '1' and MIO0 = '0' | |||
Slow blink yellow green | NOSEQ = '1' and MIO0 = '1' | |||
PHY_LED2 (Green LED Cathode, Yellow LED Anode) / PHY_LED2R (Green LED Anode, Yellow LED Cathode) | J14C* | ON | SD card plugged (SD_CD = '0') | |
OFF | Otherwise |
* This LEDs exit on the ethernet socket (J14A).
Note: The TEM0007 module has no LED.
JTAG/UART
JTAG and UART connections are available through micro USB connector. MIO14 is driven by BDBUS0 (FTDI RX). BDBUS1 (FTDI TX) is driven by MIO15 . MIO13 is driven by UART_TXD. UART_RXD is driven by MIO12.
UART 0 (HSS Console) | ||||||
---|---|---|---|---|---|---|
Designator J21 | ||||||
CPLD UART Input Pin | CPLD Pin | Connected to | CPLD UART Output Pin | CPLD Pin | Connected to | Description |
MIO12 | 100 | B2B-JB1-100 | UART_RXD | 84 | U8-Pin 11 | |
UART_TXD | 77 | U8-Pin 13 | MIO13 | 99 | B2B-JB1-98 |
UART 1 (Linux Console) | ||||||
---|---|---|---|---|---|---|
Designator J4 | ||||||
CPLD UART Input Pin | CPLD Pin | Connected to | CPLD UART Output Pin | CPLD Pin | Connected to | Description |
FT_B_TX | 139 | FTDI Chip U4 Pin 32 | MIO14 | 105 | B2B-JB1-91 | |
MIO15 | 95 | B2B-JB1-86 | FT_B_RX | 138 | FTDI Chip U4 Pin 33 |
Reference Designs
Notes
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