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Overview

 This page showcases important details of the module-carrier combination TEG2000 + TE0703 and introduces the available script-based test designs to get the board up and running.

Requirements

Getting Started with the TEG2000 + TE0703

The module TEG2000 has Cologne Chip GateMate FPGA onboard that allows you to create extensive digital hardware designs.

Most of the FPGA IOs are spread arround the carrier. The TEG2000 is assembled with a QSPI non-volatile Flash memory(128 Mbit) and plenty of IOs which enable great hardware expandability. For communication and configuration the carrier offers a JTAG/UART Interface. 

 Official Documentation

• Link to the shop: 
  • https://shop.trenz-electronic.de/de/TEG2000-01-P001-FPGA-Modul-mit-GateMate-A1-von-Cologne-Chip-16-MByte-QSPI-Flash-4-x-5-cm
• Technical Reference Manual:
  • coming soon.
• Resources & Reference Designs:
  • official cologne chip documentation(possibly login needed):
    https://colognechip.com/programmable-logic/gatemate/
  • test design - TBD!

TEG2000 module + TE0703 carrier - Hardware Features

• FPGA
  • Cologne Chip GateMate CCGM1A1 FPGA
• Clocking
  • 25 MHz clock from clocking chip SiT8008 on TEG2000 module
• Memory
  • 16 MByte Quad-SPI Flash
• Communication
  • On carrier USB-JTAG/UART
• Connectors
  • B2B connector - Module(JM1&JM2) to Carrier(JB1&JB2)
  • Unpopulated PIN Header on carrier(J1 & J2)
• Configuration and Debug
  • On carrier USB-JTAG interface
• Jumper
  • Adjustable BANK34 supply voltages VCCIOA, VCCIOC ,VCCIOD (max. 2,7V)
    
• General Purpose I/O
  • D2 user LED on module (green)

 TEG2000 + TE0703 Hardware Blockdiagram

 Basic IOs<->FPGA connections are as following, Table 1:

Board Power-Up

 TEG2000 + TE0703 Hardware Setup and Power up

1. Before connecting the Board to the PC, make sure to properly mount the module TEG2000 onto the carrier TE0703 via the B2B connector. It can only fit one way around.

2. Check the Jumper setting