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The Trenz Electronic TE0728 Carrier Board provides functionalities for testing, evaluation and development purposes of company's 6 x 6 cm SoMs. The Carrier Board is equipped with various components and connectors for different configuration setups and needs. The interfaces of the SoM's functional units and PL I/O-banks are connected via board-to-board connectors to the Carrier Board's components and connectors for easy user access.
See "6 x 6 SoM Carriers" page for more information about supported 6 x 6 cm SoMs.
Refer to http://trenz.org/te0728-info for the current online version of this manual and other available documentation.
There is no hardware component to be programmed on teh carrier.
Storage device name | Content | Notes |
---|---|---|
Signal | Designator | B2B | Jumper | Boot Mode |
---|---|---|---|---|
Boot_R | J4 | J2-11 | Open | QSPI |
Short | SD Card |
There is a user push button which is used for RESET signal.
Signal | Designator | B2B | Active Level |
---|---|---|---|
RESET | S1 | J2-7 | Active High |
Number of I/O signals FPGA bank numbers connected to the B2B connectors:
B2B Connector | Interfaces | Number of I/O | Notes |
---|---|---|---|
J1 | User I/O | 48 singel ended, 24 differential | Connected to Bank 13 |
4 Single ended | MIO10-13 | ||
CANH , CANL | 2 single ended | MIO8, MIO9 | |
J2 | User I/O | 22 singel ended, 11 differential | |
38 single ended | MIO16-53 | ||
SoM Control Signals | 5 | RESET, RST_OUT, BOOT_R, | |
JTAG Interface | 4 | TCK , TDO, TDI, TMS | |
J3 | User I/O | 20 Single ended, 10 differential | Connected to Bank 35 |
34 single ended, 17 differential | Connected to Bankd 33 | ||
Ethernet 1 | 4 single ended, 2 differential | ETH_CTREF , ETH_TD+, ETH_TD- , ETH_RD+, ETH_RD-, ETH_LED1, ETH_LED2, ETH_LED3 | |
Ethernet 2 | 4 single ended, 2 differential | ETH_CTREF , ETH_TD+, ETH_TD- , ETH_RD+, ETH_RD-, ETH_LED1, ETH_LED2, ETH_LED3 |
B2B Connector | Interfaces | Number of I/O | Notes |
---|---|---|---|
J5 | User I/O | 48 singel ended, 24 differential | Connected to Bank 13 |
34 single ended, 17 differential | Connected to Bank 33 | ||
J6 | User I/O | 42 singel ended, 21 differential | |
27 single ended | MIO16... MIO39 + MIO 51-53 | ||
4 single ended | MIO10-13 | ||
SoM Control Signals | 3 | RESET, RST_OUT, BOOT_R | |
JTAG Interface | 4 | TCK , TDO, TDI, TMS | |
CANH , CANL | 2 single ended | MIO8 , MIO9 |
JTAG access to the TE0728 Trenz Module through B2B connector J2. JTAG Programmer TE0790 is provided by Trenz Electronic, More information is available here.
Designator | Connected to | B2B Pin | Note |
---|---|---|---|
A | MIO52 | J2-15 | UART |
B | MIO53 | J2-16 | |
C | TMS | J2-12 | JTAG interface signal |
D | TDI | J2-10 | JTAG interface signal |
F | TDO | J2-8 | JTAG interface signal |
H | TCK | J2-6 | JTAG interface signal |
The DIP-switch S2 on JTAG interface is connected to JTAGEN.
S2 | ON | OFF | Default | Description |
---|---|---|---|---|
1 | Normal mode | Adapter board CPLD update mode | ON | Update Mode JTAG access to SC CPLD only |
2 | Do not use (illegal setting) | Normal mode | OFF | Must be in OFF state always. |
3 | VIO connected to 3.3V | Power VIO from pin header J2 | OFF | User I/O Voltage |
4 | Power 3.3V from USB | Power 3.3V from pin header J2 | OFF | Power on-board peripherals (FTDI chip & SC CPLD, ...) |
VDD for SD card holder is 3.3V.
Signals | Connected to | B2B | Notes |
---|---|---|---|
CD/DAT3 | MIO45 | J2-31 | |
CMD | MIO41 | J2-29 | |
CLK | MIO40_CLK | J2-34 | |
DAT0 | MIO42 | J2-37 | |
DAT1 | MIO43 | J2-40 | |
DAT2 | MIO44 | J2-32 | |
CD | MIO46 | J2-35 | |
WP | MIO47 | J2-33 |
Signal ETH1 | B2B | Signal ETH2 | B2B | Notes |
---|---|---|---|---|
ETH1_TD+ | J3-58 | ETH2_TD+ | J3-28 | Transfer |
ETH1_TD- | J3-56 | ETH2_TD- | J3-26 | |
ETH1_RD+ | J3_52 | ETH2_RD+ | J3-22 | Receive |
ETH1_RD- | J3-50 | ETH2_RD- | J3-20 | |
ETH1_CTREF | J3_57 | ETH2_CTREF | J3-25 | |
ETH1_LED1 | J3-55 | ETH2_LED1 | J3-23 | Yellow LED- Activity |
ETH1_LED3 | J3-51 | ETH2_LED3 | J3-19 | Green Green- Link |
Designator | Connected to | B2B | Active Level | Note |
---|---|---|---|---|
S1 | RESET | J2-7 | Active high | General Input RESET |
Designator | Connected to | B2B | Note |
---|---|---|---|
J4 | Boot_R | J2-11 | Open: QSPI |
Short: SD Card | |||
J11 | VCCIO | - | It connects VCCIO_13 to 3.3V or 1.8V. |
Designator | Color | Connected to | B2B | Active Level | Note |
---|---|---|---|---|---|
D1-A | Red | MIO48 | J2-30 | Active high | |
D1-B | Yellow | MIO49 | J2-38 | Active high | |
D1-C | Green | MIO50 | J2-36 | Active high |
Single 12V power supply with minimum current capability of 3.5A is recommended to operate the board.
Power Consumption
Power Input Pin | Typical Current |
---|---|
VIN | TBD* |
VBATT | TBD* |
* TBD - To Be Determined
Create DrawIO object here: Attention if you copy from other page, objects are only linked.
Power Rail Name | B2B Connector | Direction | Notes |
---|---|---|---|
VIN | J1-1, J1-3 | Input | |
VBAT | J2-1 | Input | Battery for RTC |
VCCO_13 | J1-39 | Input | Jumper(J11) connects VCCO_13 to 3.3v or 1.8v |
Module Connector (B2B) Designator | VCC / VCCIO | Direction | Pins | Notes |
---|---|---|---|---|
JB1 | VIN | In | 1,3 | Up to 12V carrier supply voltage |
3.3V | In | 19 | PL IO-bank VCCIO | |
VCCO_13 | In | 39 | 1.8V or 3.3V | |
JB2 | 3.3V | In | 2, 4 | 3.3V module supply voltage |
1.8V | In | 5 | PL IO-bank VCCIO | |
VBATT | In | 1 | RTC buffer voltage | |
JB3 | - | - | - | - |
6 x 6 modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.
3 x REF-189018-01 (compatible to TEM-140-02-03.0-H-D-A), (80 pins, "40" per row)
Symbols | Description | Min | Max | Unit |
---|---|---|---|---|
VCCPINT | PS internal logic supply voltage | -0.5 | 1.1 | V |
VCCPAUX | PS auxiliary supply voltage | -0.5 | 2.0 | V |
VCCPLL | PS PLL supply | -0.5 | 2.0 | V |
VCCO_DDR | PS DDR I/O supply voltage | -0.5 | 2.0 | V |
VPREF | PS input reference voltage | -0.5 | 2.0 | V |
VCCO_MIO0 | PS MIO I/O supply voltage for HR I/O banks | -0.5 | 3.6 | V |
VCCO_MIO1 | PS MIO I/O supply voltage for HR I/O banks | 1.71 | 3.45 | V |
Symbols | Description | Min | Max | Unit |
---|---|---|---|---|
VCCINT | PL internal logic supply voltage | -0.5 | 1.1 | V |
VCCPAUX | PL auxiliary supply voltage | -0.5 | 2.0 | V |
VCCPLL | PL PLL supply | -0.5 | 1.1 | V |
VPREF | PL input reference voltage | -0.5 | 2.0 | V |
VCCO | PL supply voltage for HR I/O banks | -0.5 | 3.6 | V |
VIN | I/O input voltage for HR I/O banks | 1.71 | 3.45 | V |
Technical Specifications
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. |
Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. |
I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. |
Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. |
I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. |
Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. |
I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. |
Storage Temperature | -40 | 125 | °C | See Xilinx DS187 datasheet. |
Commercial grade: 0°C to +70°C.
Industrial and automotive grade: -40°C to +85°C.
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. |
Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. |
I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. |
Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. |
I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. |
Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. |
I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. |
Storage Temperature | -65 | 150 | °C | See Xilinx DS187 datasheet. |
CAN Transceiver Temperature | -40 | 125 | °C | See Texas Instrument sn65hvd230q-q1 datasheet. |
SPI Flash Memory | -40 | 85 | °C | See Cypress S25FL127S datasheet. |
DDR3 SDRAM Temperature | -40 | 95 | °C | See Nanya NT5CC256M16CP-DIA datasheet. |
Physical Dimensions
Module size: 60 mm × 60 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 7 mm.
PCB thickness: 1.6 mm.
Trenz shop TE0728 overview page | |
---|---|
English page | German page |
Date | Revision | Note | PCN | Documentation Link |
---|---|---|---|---|
- | 01 | Prototypes | - | - |
Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Date | Revision | Contributor | Description |
---|---|---|---|
| |||
-- | all |
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