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USB FX2 microcontroller Configuration (RAM Firmware)

You can use CyConsole and CyControl to directly program the .iic Firmware file into the USB FX2 microcontroller's RAM.

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If you don't also write the IIC EEPROM (Lg EEPROM for CyConsole and xxx for CyControl), the new firmware is lost if the TE USB FX2 module goes under reset or power off/on cycle.

IIC EEPROM Configuration (EEPROM Firmware)

if the module exit from reset or is powered on, the IIC EEPROM content programs/configures the USB FX2 microcontroller RAM

 

 

IIC EEPROM and USB FX2 microcontroller connection.

You can use CyConsole and CyControl to directly program the .iic Firmware file into the IIC EEPROM connected to USB FX2 microcontroller.

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The firmware actually changes (it runs on USB FX2 microcontroller's RAM) only when

  • you reset the TE USB FX2 module;
  • you power off and power on the TE USB FX2 module;
  • you write the USB FX2 microcontroller's RAM (RAM for CyConsole and xxx for CyControl), the new firmware is lost if the TE USB FX2 module goes under reset or power off/on cycle).

FPGA Configuration (bitstream, RAM-like image)

If you don't also write the SPI Flash memory, the new bitstream image is lost if the TE USB FX2 module goes under reset or power off/on cycle.

 

The Xilinx Spartan-3E FPGA on the TE0300, Xilinx Spartan-3A DSP FPGA on the TE0320, Xilinx Spartan-6 FPGA on the TE0630 can be configured in the following ways:

  • B2B connector
    • JTAG
    • Slave Parallel (SelectMAP)
    • Slave Parallel
  • 6-pin JTAG header connector
  • USB connector (in fact, SPI Flash memory is used)

  • SPI Flash memory (see the next section)

Programming using JTAG interface provide convenient and fast way to test FPGA project. FPGA configuration programmed this way is volatile and lost after reset or power cycle.

For further information on

  • Xilinx Spartan-3E FPGA
  • Xilinx Spartan-3A DSP configuration modes, please consult the documentation listed in chapter 17 Related Materials and References.
  • Xilinx Spartan-6

 

SPI Flash Configuration (bitstream, PROM image)

If the TE USB FX2 module exit from reset state or is powered on (in the default state of switches), the SPI Flash content programs/configures the FPGA.

 

 

SPI Flash and FPGA connection; SPI Flash and USB FX2 microcontroller

The bit-stream for the FPGA is stored in the SPI Flash. To use this bit-stream source FPGA configuration option is set to “Master Serial/SPI”. See 2.8 SPI Flash for additional information.

SPI Flash can be programmed in several ways:

  • Direct programming by USB controller (usually done by Firmware Upgrade Tools like Python OpenFut and C# OpenFutNet).

  • Indirect SPI programming via FPGA pins, controlled by JTAG (can be done using Xilinx iMPACT). See Appendix A. Indirect SPI Programming using iMPACT.

  • Direct SPI programming by FPGA, using an SPI core (FPGA project should contain SPI interface core and software to work with it: only if iMPACT GUI is version 11.x or below, see Xilinx AR#36156)).

SPI Flash can be programmed using the following connection:

  • USB connector
  • B2B connector
    • JTAG
    • Slave Parallel (SelectMAP)
    • Slave Serial
  • 6-pin JTAG header connector

 

 

 

Configuration modes overview.


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