DEWESoft Firmware Upgrade Tool

The TE USB FX2 micromodule can be configured by means of a firmware-upgrade (FWU) file.

The first step in generating the FWU file is to generate the fpga.bin file corresponding to a given FPGA design.

FWU file generation

In order to generate the FWU file you shall

1. generate a bit-stream file from your Xilinx EDK design;

2. generate a PROM file from the bit-stream file;

3. generate a FWU file from the PROM file.

bit-stream file from your Xilinx EDK design (link)

fpga.bin file from the PROM file (link)

FWU file from the PROM file

Once you have got your fpga.bin PROM file, you can proceed and generate your FWU (= FirmWare Upgrade) file. The FWU file is a ZIP archive containing 3 files:

• Bootload.ini – TE0320 booting settings (see paragraph 10.2.4.3.1 Bootload.ini file)

• fpga.bin – FPGA configuration PROM file

• usb.bin – EZ-USB FX2LP USB microcontroller firmware

To create your FWU file, you shall

• replace the existing step4_user\fpga.bin with the latest fpga.bin (once per design)

• zip the 3 files

• rename the zip file extension to fwu

• upload the file as explained in paragraph 10.2.5 Firmware Upgrade Tool utilization.

10.2.4.3.1Bootload.ini file

The step4_user\Bootload.ini file defines some module start-up options. Version 1.0 of Bootload.ini has the following structure:

• [Info] – information section (do not edit this section)

  • Version – Bootload.ini file format version

  • DeviceType – 3 stands for current device type

• [Settings]: settings section

  • FPGABitSwap – see Xilinx UG332: Spartan-3 Generation Configuration User Guide, chapter SelectMAP Data Ordering (default = 1 = do bit swapping)

  • FPGAPowerON – value of FX2_PS_EN after SPI Flash memory programming (see paragraph 6.8.2 Slide Switch S2) (default = 1 = power on after upgrade)

10.2.4.3.2usb.bin file

The step4_user\usb.bin file contains the firmware to be written in the large EEPROM of the EZ-USB FX2LP USB microcontroller and loaded at module start-up to implement the DEWESoft instruction set.

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Once you have got your fpga.in file, you can proceed and generate your FWU file. The FWU file is a ZIP file containing 3 files:

• Bootload.ini – booting settings

• fpga.bin – FPGA programming file

• usb.bin – FX2 firmware

To create your FWU file, you need to

• replace the existing USBFWUTool\FWUs\fpga.bin with the latest fpga.bin (Bootload.ini and usb.bin are always unchanged)

• zip the 3 files

• change the “zip” file extension to “fwu”

• upload the file as explained in the next section (Micromodule Configuration).

Reboot the micromodule with the new firmware by disconnecting and reconnecting the USB cable. You may want to test the sample application “TE0300_API_Example.exe” in the “TE0300_API_Example\Debug” folder.

To generate your own firmware upload file, please read the document “Generating_FWU_file.doc” in the “USBFWUTool” folder.

FWU file generation

In order to generate the FWU file you shall

1. generate a bit-stream file from your Xilinx EDK design;

2. generate a PROM file from the bit-stream file;

3. generate a FWU file from the PROM file.

bit-stream file from your Xilinx EDK design

In order to generate a .bit bit-stream file from your Xilinx EDK design, you shall

• open your ./system.xmp project file with Xilinx EDK;

• select project / clean all generated files (optional);

• select hardware / generate bitstream .

This will generate the bit-stream file download.bit in the ./implementation/ folder of your "." project folder.

ROM file from the bit-stream file

In order to generate a .bin PROM file from the bit-stream file download.bit, start Xilinx iMPACT. The following example shows the case of Xilinx iMPACT 11.3.

Select file / new project.

Choose create a new project.

Press OK.

Select prepare a PROM file.

Press OK.

Select step 1. storage target / Xilinx Flash/PROM of the left panel and press the left green arrow.

Select step 2. add storage device(s) / auto select PROM of the middle panel and press the right green arrow.

In step 3. enter data of the right panel

• type fpga in the output file name input field;

• choose a suitable path for the output file location input field;

• select BIN (swap bits ON) from the drop-down menu file format in the flash/PROM file property sub-panel;

• press the OK button in the bottom left corner of the current window.

Any other name than fpga for the output file name input field is not allowed.

Just acknowledge the pup-up message.

Browse to the ./implementation/ folder of your "." project folder and select the bit-stream file download.bit.

Press the open button in the bottom left corner of the current window.

Your design likely consist of just one device file.

So deny the request by pressing the NO button.

Just acknowledge the pup-up message.

Select operations / generate file... or double click generate file... from the iMPACT processes panel.

You should see the following message in the main panel: generate succeeded.

You might now want to save your Xilinx iMPACT project settings for future use.

In the folder corresponding to the path you chose as the output file location, you should find the fpga.bin PROM file.

10.2.4.3