Verification

The quickest way to test most module functions is to execute the sample DMA test available in TE_USB_Suite package. Hereunder is reported a sample trace of a successful execution.
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
1
1
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
2
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
5
fifo_error: 0
current_mode: 1
flash_busy: 0
fpga_prog.: 170
booting: 1
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
6
Major version: 1
Minor version: 7
Device hi: 1
Device lo: 1
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
7
INT# : 1
Major version: 7
Minor version: 1
Release version: 2
Build version: 24
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
8
EP2 FIFO CS: 0x04
EP4 FIFO CS: 0x04
EP6 FIFO CS: 0x04
EP8 FIFO CS: 0x04
EP2 FIFO BCH: 0x00
EP4 FIFO BCH: 0x00
EP6 FIFO BCH: 0x00
EP8 FIFO BCH: 0x00
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
9
Resetting all FIFOs
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
w
Resetting all FIFOs
host->memory data verification PASSED!
Transferred 120000 kB in 4.048 s = 28.953 MB/s
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
r
Resetting all FIFOs
memory->host data verification PASSED!!!
Transferred 120000 kB in 3.268 s = 35.861 MB/s
TE0320 DLL Example 1.0
1 - Get number of modules
2 - Connect module No 0
3 - Connect module No 1
4 - Disconnect
5 - Get FX2 status
6 - Get FX2 version
7 - Get FPGA firmware version
8 - Get FX2 FIFO Status
9 - Reset FX2 FIFO Status
w - Write high speed data (FPGA RX)
r - Read high speed data (FPGA TX)
0 - Exit
0
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