TE0820 HDMI701

Overview

Refer to http://trenz.org/te0820-info for the current online version of this manual and other available documentation.

Key Features

• Vitis/Vivado 2019.2
• PetaLinux
• Linux Debian 9 (Stretch) or Linux Ubuntu 18.04 (Bionic Beaver)
• HDMI
• SD
• ETH (use EEPROM MAC)
• USB
• I2C
• TE0701
• RTC
• Modified FSBL for SI5338 programming and DMA (for HDMI)
• Special FSBL for QSPI programming

Revision History

Release Notes and Know Issues

Requirements

Software

Hardware

Basic description of TE Board Part Files is available on TE Board Part Files.

Complete List is available on <design name>/board_files/*_board_files.csv

Design supports following modules:

Design supports following carriers:

Additional HW Requirements:

Content

For general structure and of the reference design, see Project Delivery - AMD devices

Design Sources

Additional Sources

Prebuilt

Download

Reference Design is only usable with the specified Vivado/Vitis/PetaLinux version. Do never use different Versions of Xilinx Software for the same Project.

Reference Design is available on:

• TE0820 "HDMI0701" Reference Design

Design Flow

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

• AMD Development Tools#XilinxSoftware-BasicUserGuides
• TE Reference Designs Overview
• Project Delivery - AMD devices

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality

1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
   
2. Press 0 and enter to start "Module Selection Guide"
3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
4. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
   
   1. (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see also TE Board Part Files
5. Create XSA and export to prebuilt folder
   
   1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
6. Create Linux (bl31.elf, uboot.elf and image.ub) with exported XSA
   
   1. XSA is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
   2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
   3. Build the Debian image/Ubuntu image file with executing the "mkdebian_stretch.sh"/"mkubuntu_BionicBeaver.sh" file in Linux Terminal
7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
   
   1. "prebuilt\os\petalinux\<ddr size>" or "prebuilt\os\petalinux\<short name>"
8. Generate Programming Files with Vitis
   
   1. Run on Vivado TCL: TE::sw_run_vitis -all
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
   2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_vitis
      Note:  TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis

Launch

Programming

Xilinx documentation for programming and debugging:  AMD Development Tools#XilinxSoftwareProgrammingandDebugging

Get prebuilt boot binaries

1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell
2. Press 0 and enter to start "Module Selection Guide"
   1. Select assembly version
   2. Validate selection
   3. Select Create and open delivery binary folder
      Note: Folder (<project foler>/_binaries_<Artikel Name>) with subfolder (boot_<app name>) for different applications will be generated

QSPI

Not used in this Example.

SD

1. Format the SD Card with SD Card Formatter or other tool
2. Write the Debian image or Ubuntu image file on SD Card with Win32DiskImager
3. Copy Petalinux  image.ub and Boot.bin on SD-Card.
   • use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
   • or use prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
4. Set Boot Mode to SD-Boot.
   • Depends on Carrier, see carrier TRM.
5. Insert SD-Card in SD-Slot.

JTAG

Not used on this Example.

Usage

1. Prepare HW like described on section TE0820 HDMI701#Programming
2. Connect UART USB (most cases same as JTAG)
3. Select SD Card as Boot Mode
   Note: On TE0701 Default  Firmware Boot Mode is selected via SD card (insered SD Card for SD Boot Mode)
4. Connect HDMI to Monitor
5. Connect USB Adapter with Hub and Mouse+Keyboard
6. Power On PCB
   Note: 1. Zynq Boot ROM loads FSBL from SD into OCM, 2. FSBL loads U-boot from SD into DDR, 3. U-boot load Linux from SD into DDR

Linux

1. Open Serial Console (e.g. putty)
   
   1. Speed: 115200
   2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
2. Linux Console:
   Note: Wait until Linux boot finished For Linux Login use:
   
   1. User Name: root
   2. Password: root
3. You can use Linux shell now.
4. Debian Desktop
   1. Debian Desktop will be started automatically
   2. Use connected mouse + keyboard for interaction with GUI
   3. Web Browser Dillo open console and type dillo or use browser
   4. open console and start video or audio with "mplayer <video or audio file>"
5. Ubuntu Desktop
   1. Ubuntu Desktop will be started automatically
   2. Use connected mouse + keyboard for interaction with GUI
   3. Web Browser Mozilla firefox can be used.
   4. Audio or Vider file can also be performed directly in GU

Vivado HW Manager

Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder)

• Control:
• Monitoring:

System Design - Vivado

Block Design

Block Design

PS Interfaces

Activated interfaces:

Constrains

Basic module constrains

set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLNONE [current_design]

Design specific constrain

 TODO replace loc constrains with correct one for TE0820
#
# TE0701 I2C Bus
#
set_property PACKAGE_PIN P7 [get_ports IIC_1_scl_io]
set_property PACKAGE_PIN P6 [get_ports IIC_1_sda_io]
set_property IOSTANDARD LVCMOS18 [get_ports IIC_1_scl_io]
set_property IOSTANDARD LVCMOS18 [get_ports IIC_1_sda_io]

#
# ADV7511 Interface
#
set_property PACKAGE_PIN L6 [get_ports hdmi_out_clk]
set_property PACKAGE_PIN L7 [get_ports hdmi_out_de]
set_property PACKAGE_PIN K4 [get_ports hdmi_out_hsync]
set_property PACKAGE_PIN K3 [get_ports hdmi_out_vsync]
set_property PACKAGE_PIN T6 [get_ports {hdmi_out_data[0]}]
set_property PACKAGE_PIN R6 [get_ports {hdmi_out_data[1]}]
set_property PACKAGE_PIN V9 [get_ports {hdmi_out_data[2]}]
set_property PACKAGE_PIN U9 [get_ports {hdmi_out_data[3]}]
set_property PACKAGE_PIN T7 [get_ports {hdmi_out_data[4]}]
set_property PACKAGE_PIN N8 [get_ports {hdmi_out_data[5]}]
set_property PACKAGE_PIN R7 [get_ports {hdmi_out_data[6]}]
set_property PACKAGE_PIN N9 [get_ports {hdmi_out_data[7]}]
set_property PACKAGE_PIN Y8 [get_ports {hdmi_out_data[8]}]
set_property PACKAGE_PIN V8 [get_ports {hdmi_out_data[9]}]
set_property PACKAGE_PIN W8 [get_ports {hdmi_out_data[10]}]
set_property PACKAGE_PIN U8 [get_ports {hdmi_out_data[11]}]
set_property IOSTANDARD LVCMOS18 [get_ports hdmi_*]

set_property PACKAGE_PIN H7 [get_ports {cec_clk[0]}]
set_property PACKAGE_PIN M8 [get_ports {ct_hpd[0]}]
set_property PACKAGE_PIN J7 [get_ports {ls_oe[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {cec_clk[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {ct_hpd[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {ls_oe[0]}]

Software Design - Vitis

For SDK project creation, follow instructions from:

Vitis

Application

Template location: ./sw_lib/sw_apps/

zynqmp_fsbl

TE modified 2019.2 FSBL

General:

• Modified Files: xfsbl_main.c, xfsbl_hooks.h/.c, xfsbl_board.h/.c(search for 'TE Mod' on source code)
• Add Files:  te_xfsbl_hooks.h/.c (for hooks and board)\n\
• General Changes: 
  
  • Display FSBL Banner and Device Name

Module Specific:

• Add Files: all TE Files start with te_*
  
  • Si5338 Configuration
  • ETH+OTG Reset over MIO
  • DMA for HDMI

zynqmp_fsbl_flash

TE modified 2019.2 FSBL

General:

• Modified Files: xfsbl_initialisation.c, xfsbl_hw.h, xfsbl_handoff.c, xfsbl_main.c
• General Changes:
  
  •  Display FSBL Banner
  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

zynqmp_pmufw

Xilinx default PMU firmware.

U-Boot

U-Boot.elf is generated with PetaLinux. Vitis is used to generate Boot.bin.

Software Design -  PetaLinux

For PetaLinux installation and  project creation, follow instructions from:

• PetaLinux KICKstart

Config

Start with petalinux-config or petalinux-config --get-hw-description

Select Image Packaging Configuration ==> Root filesystem type ==> Select SD Card

Changes:

• CONFIG_SUBSYSTEM_PRIMARY_SD_PSU_SD_1_SELECT=y
• CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_3_MAC=""

• # CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS is not set

• # CONFIG_SUBSYSTEM_ROOTFS_INITRD is not set

• # CONFIG_SUBSYSTEM_ROOTFS_JFFS2 is not set

• # CONFIG_SUBSYSTEM_ROOTFS_NFS is not set

• CONFIG_SUBSYSTEM_ROOTFS_SD=y

• # CONFIG_SUBSYSTEM_ROOTFS_OTHER is not set

• # CONFIG_SUBSYSTEM_BOOTARGS_AUTO is not set

• CONFIG_SUBSYSTEM_USER_CMDLINE="console=ttyPS0,115200 earlycon clk_ignore_unused earlyprintk root=/dev/mmcblk1p2 rootfstype=ext4 rw rootwait cma=256M"

• CONFIG_SUBSYSTEM_DEVICETREE_FLAGS=""

• # CONFIG_SUBSYSTEM_DTB_OVERLAY is not set

• # CONFIG_SUBSYSTEM_REMOVE_PL_DTB is not set

U-Boot

Start with petalinux-config -c u-boot

Changes:

• CONFIG_ENV_IS_NOWHERE=y

• # CONFIG_ENV_IS_IN_SPI_FLASH is not set

• CONFIG_I2C_EEPROM=y

• CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA

• CONFIG_SYS_I2C_EEPROM_ADDR=0x50

• CONFIG_SYS_I2C_EEPROM_BUS=0

• CONFIG_SYS_EEPROM_SIZE=256

• CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=0

• CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0

• CONFIG_SYS_I2C_EEPROM_ADDR_LEN=1

• CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0

Device Tree

/include/ "system-conf.dtsi"
/ {
	chosen {
    		xlnx,eeprom = &eeprom;
		    bootargs= "console=ttyPS0,115200 earlycon clk_ignore_unused earlyprintk root=/dev/mmcblk1p2 rootfstype=ext4 rw rootwait cma=256M";

  	};
};


/ {
	#address-cells = <2>;
	#size-cells = <2>;
	memory@0{
	  device-type = "memory";
	  reg = <0x000000000 0x00000000 0x00000000 0x80000000>;
	};	
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		hdmi_fb_reserved_region: framebuffer@7FC00000 {
		    compatible = "removed-dma-pool";
		    //compatible = "shared-dma-pool";
		    //compatible = "xlnx,reserved-memory";
		    no-map;
		    reg = <0x0 0x7FC00000 0x0 0x400000>;
		};
      	};
 
	hdmi_fb: framebuffer@0x7FC00000 {           // HDMI out
		compatible = "simple-framebuffer";
		reg = <0x0 0x7FC00000 0x0 (1280 * 720 * 4)>;    // 720p
		width = <1280>;                         // 720p
		height = <720>;                         // 720p
		stride = <(1280 * 4)>;                  // 720p
		format = "a8b8g8r8";
		status = "okay";
	};
};

&axi_vdma_0 {
   status = "disabled";
};
  
&v_tc_0 {
    //xilinx-vtc: probe of 43c20000.v_tc failed with error -2
    status = "disabled";
};

/* SDIO */

&sdhci1 {
   status = "okay";
   disable-wp;
   no-1-8-v;
};

/* ETH PHY */
&gem3 {

	status = "okay";
  ethernet_phy0: ethernet-phy@0 {
		compatible = "marvell,88e1510";
		device_type = "ethernet-phy";
    		reg = <1>;
	};
};
/* USB 2.0 */
 
/* USB  */
&dwc3_0 {
    status = "okay";
    dr_mode = "host";
    maximum-speed = "high-speed";
    /delete-property/phy-names;
    /delete-property/phys;
    /delete-property/snps,usb3_lpm_capable;
 	 snps,dis_u2_susphy_quirk;
  	snps,dis_u3_susphy_quirk;
};
   
&usb0 {
    status = "okay";
    /delete-property/ clocks;
    /delete-property/ clock-names;
    clocks = <0x3 0x20>;
    clock-names = "bus_clk";
};




/* QSPI PHY */
&qspi {
    #address-cells = <1>;
    #size-cells = <0>;
    status = "okay";
    flash0: flash@0 {
        compatible = "jedec,spi-nor";
        reg = <0x0>;
        #address-cells = <1>;
        #size-cells = <1>;
    };
};

&i2c0 {
  eeprom: eeprom@50 { 
     compatible = "atmel,24c08";
     reg = <0x50>;
  };
};

Kernel

Start with petalinux-config -c kernel

Changes:

• CONFIG_CPU_IDLE is not set (only needed to fix JTAG Debug issue)

• CONFIG_CPU_FREQ is not set (only needed to fix JTAG Debug issue)

• CONFIG_EDAC_CORTEX_ARM64=y
• CONFIG_FB_SIMPLE
• CONFIG_LOGO
• CONFIG_LOGO_LINUX_MONO
• CONFIG_LOGO_LINUX_VGA16
• CONFIG_LOGO_LINUX_CLUT224

Rootfs

File System will be generated with Debian script or Ubuntu script (mkdebian_stretch.sh/mkubuntu_BionicBeaver.sh)

Applications

Applications will be generated with Debian script or Ubuntu script (mkdebian_stretch.sh/mkubuntu_BionicBeaver.sh)

Additional Software

SI5338

File location <design name>/misc/Si5338/Si5338-*.slabtimeproj

General documentation how you work with these project will be available on Si5338

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

Legal Notices