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Table of Contents

Overview

Trenz Electronic TE0728 is an automotive-grade FPGA module integrating a Xilinx Automotive Zynq-7020 FPGA, two 100 Mbit Ethernet transceivers (PHY) , 512 MByte DDR3L SDRAM, 16 MByte Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips. 

Within the complete module only Automotive components are installed.

All this in a compact 6 x 6 cm form factor, at the most competitive price.

Refer to http://trenz.org/te0728-info for the current online version of this manual and other available documentation.

Key Features

    • Xilinx XA7Z020-1CLG484Q (Automotive)
    • Rugged for shock and high vibration
    • Dimensions: 6 x 6 cm
    • Temperature range: automotive
    • 2 x ARM Cortex-A9 MPCore
    • 2 x 100 MBit Ethernet transceiver (PHY)
    • 512 MByte DDR3L SDRAM, 16-bit-wide 
    • 16 MByte QSPI Flash memory (with XiP support)
    • Plug-on module with 3 x 80-pin Samtec Micro Tiger Eye(TM) high-speed connectors
    • 76 single ended I/O, 24 LVDS pairs (48 I/O) and 42 MIO available on board-to-board connectors
    • CAN transceiver (PHY)
    • 12 V power supply with watchdog
    • On-board high-efficiency DC-DC converters
    • System management and power sequencing
    • eFUSE bit-stream encryption
    • AES bit-stream encryption
    • Temperature compensated RTC (real-time clock)
    • Three user LEDs
    • Evenly-spread supply pins for good signal integrity

      Other assembly options for cost or performance optimization plus high volume prices available on request.

      Depending on the customer design, additional cooling might be required.

Block Diagram


TE... block diagram

Main Components


TE... main components
  1. 512 MByte DDR3 SDRAM, Cypress DDR3 Memory, U1
  2. Xilinx Automotive XA7Z020-1CLG484Q ,U2
  3. 100 MBit Ethernet transceiver  DP83848MPHPEP, U3
  4. 3.5V to 60V step-down converter with Eco-mode, Texas Instruments TPS54260-Q1, U4
  5. Standard Clock Oscillators 25MHz 3.3V, SiTime SiT1618xx, U5
  6. 1.5 A Low Dropout Linear Regulator with programmable soft-start, Texas Instruments, TPS74801QRGWRQ1, U6
  7. Real Time Clock, Micro Crystal RV-3029-C3, U7
  8. 3.5V to 60V step-down converter with Eco-mode, Texas Instruments TPS54260-Q1, U8
  9. 3.5V to 60V step-down converter with Eco-mode, Texas Instruments TPS54260-Q1, U9
  10. 100 MBit Ethernet transceiver  DP83848MPHPEP, U10
  11. 64 Kbit I2C EEPROM,  24AA64/24LC64/ 24FC64,(24xx64), U11
  12. Low-Quiescent-Current Priggrammable Delay Supervisory Circuit, Texas Instruments TPS3808Gxx-Q1, U12
  13. 16 MByte QSPI Nor Flash memory, Cypress S25FL127, U13
  14. Standard Clock Oscillators 50MHz 3.3V, SiTime SiT8918xx, U14
  15. Low-Quiescent-Current Priggrammable Delay Supervisory Circuit, Texas Instruments TPS3808Gxx-Q1, U15
  16. CAN Tranceiver, Texas Instruments SN65HVD230Q, U16

Initial Delivery State


Storage device name

Content

Notes

..

..

..
OTP Flash areaEmptyNot programmed.
Initial delivery state of programmable devices on the module.

Control Signals

Signals, Interfaces and Pins

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

FPGA BankB2B ConnectorI/O Signal CountVoltage LevelNotes
13JM148VCCO_13
500JM143.3V
33JM3343.3V
35JM3203.3V
35JM2223.3V
501JM238VMIO1MIO1 VREF is connected to resistor divider to support HSTL18

JTAG Interface

JTAG access to the Xilinx XA7Z020 FPGA through B2B connector JM2.

JTAG Signal

B2B Pin

TMSJM2-12
TDIJM2-10
TDOJM2-8
TCKJM2-6


PS7 UART

There is no fixed mapping for PS7 UART, if needed it can be mapped to free pins from MIO1 Bank or via EMIO to PL pins.

Recommended mapping for primary (console, debug) UART are MIO52, MIO53 for all cases when MIO1 is not used for off-board Gigabit ETH PHY.

On-board Peripherals

Chip/InterfaceICPS7 Peripheral
SPI FlashS25FL127SABMFV10QSPI016 MByte Flash
I2C EEPROM24xx64I2C08 KByte EEPROM
RTC I2CRV-3029I2C0
RTC InterruptRV-3029GPIO - MIO0
User LED
GPIO - MIO7

16 MByte Quad SPI Flash Memory

On-board QSPI flash memory S25FL127SABMFV10 is used to store initial FPGA configuration. Datasheet is provided here. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

RTC I2C




EEPROM



LEDs

DesignatorColorConnected toActive LevelIO Standard
D9GreenDONELownot applicable
D8REDMIO7HighLVCMOS33
D4GreenPL pin V18HighLVCMOS33

512 Mbyte DDR3L SDRAM

The TE0728 SoM has two 512 GByte volatile DDR3 SDRAM IC for storing user application code and data.

  • Part number: NT5CC256M16DP Nanya
  • Supply voltage: 1.35V
  • Speed: 1600 Mbps
  • NOR Flash
  • Temperature: 0C~95C

 Configuration of the DDR3 memory controller in the FPGA should be done using the MIG tool in the Xilinx Vivado Design Suite IP catalog.

Ethernet

There are two 100 MBit Extreme Temperature Ethernet PHY's DP83848-EP provided by Texas Instrument on the board. Datasheet is provided TI website, Literature number SNLS208H. Both PHY's are connected with all I/O Pins to FPGA Bank 34 (VCCIO = 3.3V). PHY Clock 25 MHz source is provided from MEMS Oscillator. There is no sharing of signals for the two PHY's.

PUDC pin is connected with pull-up to 3.3V those pre-configuration pull-ups are disabled by default. Strapping resistor exist to change the PUDC mode.

Both PHY's must be operated in MII Mode, other modes are not supported. It is possible to use PS ENET0 or ENET1 via EMIO routing or Ethernet IP Cores implemented in PL Fabric.


ETH1ETH2PullupNotes
CTREFJ3-57J3-25
Magnetics center tap voltage
TD+J3-58J3-28on-board
TD-J3-56J3-26on-board
RD+J3-52J3-22on-board
RD-J3-50J3-20on-board
LED1J3-55J3-23on-board
LED2J3-53J3-21on-board
LED3J3-51J3-19on-board
POWERDOWN/INTL21R20on-chipIt is recommended to configure FPGA I/O as input with Pullup or as output driving 1 if Interrupt not used.
RESET_NM15R16on-chipIt is recommended to configure FPGA I/O as input with Pullup or as output (active low PHY Reset).

It is recommended to add IOB TRUE constraint for the MII Interface pins.

When connecting the PHY's to Zynq PS ETH0, ETH1 EMIO GMII Interfaces it is recommended to use GMII to MII Wrap IP Core. This IP core maps the EMIO GMII to external MII Interface.

CAN Transceiver

The SN65HVD230Q,  controller area network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers. The datasheet is avaiable in Texas Instrumens website. They are intended for use in applications employing the CAN serial communication physical layer in accordance with the ISO 11898 standard. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps. Temperature must be in range of -40C~125C.

Clock Sources

ICDescriptionFrequencyUsed as
U14MEMS Oscillator33.3333 MHzPS7 PLL clock
U5MEMS Oscillator25 MHzEthernet PHY Clock
U7RTC (internal oscillator)32.768 KHzUsed by RTC, CLKOUT of RTC not connected

Power and Power-On Sequence

Power Consumption

Power Distribution Dependencies

add drawIO object here: Attention if you copy from other page, objects are only linked.

Power Distribution

Power-On Sequence

Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Power Sequency

Voltage Monitor Circuit

Power Rails

Power Rail Name

B2B Connector

JM1 Pin

B2B Connector

JM2 Pin

B2B Connector

JM3 Pin

DirectionNotes
VIN1,3--Input
3.3192, 4-Output

1.8

395-Output







Bank Voltages

Board to Board Connectors

Absolute Maximum Ratings

Technical Specifications

ParameterMinMaxUnitsReference Document










Module absolute maximum ratings.

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document










Recommended Operating Conditions.

Physical Dimensions


Physical dimensions drawing

Variants Currently In Production

Trenz shop TE0xxx overview page
English pageGerman page
Trenz Electronic Shop Overview


Revision History

Hardware Revision History

DateRevisionNotePCNDocumentation Link
-01Prototypes--





Hardware Revision History

Hardware Revision Number

Hardware revision number is printed on the PCB board next to the module model number separated by the dash.

Document Change History

DateRevisionContributorDescription

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Document change history.

Disclaimer

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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