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The Trenz Electronic TEI0015 is an commercial-grade, low cost and small size module integrated with Intel® MAX 10.  Intel MAX 10 devices are the ideal solution for system management, I/O expansion, communication control planes, industrial, automotive, and consumer applications.

Refer to for the current online version of this manual and other available documentation.

Key Features

  • Intel® MAX 10 Commercial [10M08SAU169C8G]
    • Package: 169-UBGA
    • Speed Grade: C8 (Slowest)
    • Temperature: 0°C ~ 85°C
  • SDRAM Memory up to 64Mb, 166MHz
  • Dual High Speed USB to Multipurpose UART/FIFO IC
  • Quad SPI Flash, 64Mb
  • EEPROM Memory, 4Kb
  • 8x User LED 

  • USB port

  • 18 Bit Analog to Digital Converter

  • 2x SMA Female Connector

  • Power Supply:

    • 5V

  • Others:

    • Dimension: 86m x 25m

    • Instrumentation Amplifier

    • Voltage Feedback Amplifier

Block Diagram

TEI0015 block diagram

Main Components

TEI0015 main components
  1. SMA Connector, J5...6
  2. Instrumentation Amplifier, U12- U14
  3. Series Voltage Reference, U8
  4. Analog to Digital Convertor, U15- U6
  5. Voltage Regulator, U10- U13- U16
  6. Buck Switching Regulator, U11- U4
  7. Intel® MAX 10, U1
  8. SDRAM Memory, U2
  9. SPI Flash Memory, U5
  10. USP to UART convertor, U3
  11. User LEDs, D2...9
  12. 4Kb EEPROM, U9
  13. Switch, S1...2
  14. USB port, J9
  15. Pin Holder (Not assembled), J1...4

Initial Delivery State

Storage device name



Quad SPI Flash

Not Programmed

I2C Configuration EEPROM


SDRAMNot Programmed

Initial delivery state of programmable devices on the module

Configuration Signals

The FPGA configuration for Intel MAX 10 FPGAs can be stored through JTAG interface either in external configuration device (QSPI flash memory U5) or on the FPGA itself since the Intel MAX 10 FPGA offers non-volatile memory on chip. The FPGA configuration is loaded from the non-volatile memory when the board is powered up.

To configure the FPGA directly, the JTAG interface can be used to configure the FPGA volatile, means the configuration is lost after power off.

Reset process must be done by pressing push button S1.


Push ButtonPin HeaderNote


S1J2connected to nCONFIG
Reset process.

Signals, Interfaces and Pins

I/Os on Pin Headers and Connectors

FPGA BankConnector DesignatorI/O Signal CountVoltage LevelNotes
Bank 1AJ173.3VAIN0...6
Bank 1BJ453.3VJTAG interface
Bank 2J143.3VDIO2...5
Bank 5J293.3VDIO6...14
Bank 8J213.3VRESET
General I/Os to Pin Headers and connectors information

FPGA I/O Banks

FPGA BankI/O Signal CountConnected toNotes
Bank 1A71x14 Pin header, J1AIN0...6
1Jumper, J3AIN7
Bank 1B51x6 Pin header, J4JTAG_EN, TDI, TDO, TMS, TCK
Bank 241x14 Pin header, J1D2...5


112MHz Oscillator, U7CLK12M

2Amplifier, U12nIAMP_A0, nIAMP_A1
Bank 59

1x14 Pin header, J2

21x14 Pin header, J1DIO0...1
Bank 616SDRAM, U2DQ0...15
2SDRAM, U2DQM0...1
Bank 88User Red LEDs, D2...9LED0...7




1Push Button, S2USER_BTN
FPGA I/O Banks

JTAG Interface

JTAG access to the TEI0015 SoM through pin header connector J4.

JTAG Signal

Pin Header Connector



JTAG pins connection

On-board Peripherals

SPI Flash MemoryU5
OscillatorU712MHz clock source
A2D ConvertorU12, U14Analog to Digital Convertor
8x User LEDsD2...9Red LEDs
On board peripherals

Quad SPI Flash Memory

TEI0015 is equipped with a Winbond 64 MBit (8 MByte) SDRAM chip in standard configuration, variants with 256 Mbit (32 MByte) memory density are also available. The SDRAM chip is connected to the FPGA bank 3 and 6 via 16-bit memory interface with 166MHz clock frequency and CL3 CAS latency.

SDRAM I/O Signals

Signal Schematic Name

Connected toNotes
Address inputs

A0 ... A13

bank 3-
Bank address inputs

BA0 / BA1

bank 3

Data input/output

DQ0 ... DQ15

bank 6

Data mask

DQM0 ... DQM1

bank 6

ClockCLKbank 3
Control Signals


bank 3

Chip select


bank 3

Clock enable


bank 3

Row Address Strobe


bank 3

Column Address Strobe

WEbank 3Write Enable
Quad SPI interface MIOs and pins


The FTDI chip U3 converts signals from USB2 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip.
FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of Channel B are routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or other standard interfaces.

The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U9.

FTDI Chip U3 PinSignal Schematic NameConnected toNotes
ADBUS0TCKFPGA bank 1B, pin G2JTAG interface
ADBUS1TDIFPGA bank 1B, pin F5
ADBUS2TDOFPGA bank 1B, pin F6

FPGA bank 1B, pin G1

BDBUS0BDBUS0FPGA bank 8, pin A4user configurable
BDBUS1BDBUS1FPGA bank 8, pin B4user configurable
BDBUS2BDBUS2FPGA bank 8, pin B5user configurable
BDBUS3BDBUS3FPGA bank 8, pin A6user configurable
BDBUS4BDBUS4FPGA bank 8, pin B6user configurable
BDBUS5BDBUS5FPGA bank 8, pin A7user configurable
FTDI chip interfaces and pins

SPI Flash Memory

On-board serial configuration memory (U5) is provided by Winbond with 64 MBit (8 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 8 via SPI interface.

Signal Schematic NameConnected toNotes
F_CSFPGA bank 8, pin B3chip select
F_CLKFPGA bank 8, pin A3clock
F_DIFPGA bank 8, pin A2data in / out

FPGA bank 8, pin C4

data in / out, configuration dual-purpose pin of FPGA
DEVCLRNFPGA bank 8, pin B9data in / out, configuration dual-purpose pin of FPGA
F_DOFPGA bank 8, pin B2data in / out
Quad SPI Flash memory interface


The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U9.

SchematicConnected toNotes


I2C EEPROM interface MIOs and pins


DesignatorColorConnected toActive LevelNote
D2...9RedLED1...8Active HighUser LEDs
D10RedCONF_DONEActive LowConfiguration DONE LED
D1Green3.3V Power RailActive HighAfter power on it will be on
On-board LEDs

Clock Sources

Clock SourceSchematic NameFrequencyNote
Microchip MEMS Oscillator, U7CLK12M12.00 MHz

Connected to FTDI FT2232 U3, pin 3

Connected to FPGA SoC bank 2, pin H6


Power and Power-On Sequence

Power Supply

Power supply with minimum current capability of xx A for system startup is recommended.

Power Consumption

Power Input PinTypical Current
Power Consumption

* TBD - To Be Determined

Power Distribution Dependencies

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Power Distribution

Power-On Sequence

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Power Sequency

Voltage Monitor Circuit

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Voltage Monitor Circuit

Power Rails

Power Rail Name

B2B Connector

JM1 Pin

B2B Connector

JM2 Pin

B2B Connector

JM3 Pin


Module power rails.

Bank Voltages


Schematic Name



Zynq SoC bank voltages.

Board to Board Connectors

? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

  • 3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)

    Operating Temperature: -??°C ~ ??°C
    Current Rating: ??A per ContactNumber of Positions: ??
    Number of Rows: ??

Technical Specifications

Absolute Maximum Ratings










PS absolute maximum ratings

Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

ParameterMinMaxUnitsReference Document

VSee ???? datasheets.

VSee Xilinx ???? datasheet.

VSee Xilinx ???? datasheet.

VSee Xilinx ???? datasheet.

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°CSee Xilinx ???? datasheet.

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Recommended operating conditions.

Physical Dimensions

  • Module size: ?? mm × ?? mm.  Please download the assembly diagram for exact numbers.

  • Mating height with standard connectors: ? mm.

PCB thickness: ?? mm.

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Physical Dimension

Currently Offered Variants 

Trenz shop TE0728 overview page
English pageGerman page
Trenz Electronic Shop Overview

Revision History

Hardware Revision History

List of online PCN ...Link


Hardware Revision History

Document Change History



Pedram Babakhani

  • change list



  • --
Document change history.


Data Privacy

Please also note our data protection declaration at

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

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Copyright Notice

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Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.



Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).


Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.


Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.

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