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Template Revision 1.0 - on construction

Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board"

Important General Note:

Export PDF to download, if Libero or SoftConsole revision is changed!
Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro
- Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
  - Figure template (note: inner scroll ignore/only with drawIO object):
    
    Create DrawIO object here: Attention if you copy from other page, use
    
    image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed
  - Table template:
    - Layout macro can be use for landscape of large tables
    - Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)
      Example Comment
      1 2
...

Overview

Notes :

short description of the design
Short Link of "Scroll only" macro:
- Use short link the Wiki Resource page, for example: http://trenz.org/te0720-info
- List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

This demo is a Webserver which utilizes SmartFusion2 SoC ARM Cortex-M3, Ethernet, USB / COM-port, Real Time Clock and the on-board LEDs.

The demo is offered in two variants, one which is stored into the embedded non-volatile memory (eNVM) and the seconde one which stored to the external DDR3/L SDRAM memory and therefore volatile.

Refer to http://trenz.org/tem0002-info for the current online version of this manual and other available documentation.

Key Features

Notes :

Add basic key futures, which can be tested with the design

Libero 12.4 (FPGA IDE)
SoftConsole 6.2 (Software IDE)
FreeRTOS V7.0.1 (Free real time operating system)
lwIP 1.4.1 (lightweight IP)
ETH
UART
DDR
eNVM
User LED access
Real Time Clock

Revision History

Notes :

add every update file on the download
add design changes on description
Datum & Ordnernamen UPDATEN / CHECKEN

Date	Libero	Project Built	Authors	Description
2020-11-23	12.4	TEM0002-SmartBerry_Webserver-Demo_Libero-12.4_20201123-1511 .zip	Kilian Jahn	Added "Hello World" (into SoftConsole workspace) Demo Webserver ported from Libero 11.8 Improved its User Interface
2018-02-26	11.8	Smartberry_Webserver_Demo.zip	--	Initial release

Release Notes and Know Issues

Notes :

add known Design issues and general notes for the current revision
do not delete known issue, add fixed version time stamp if issue fixed

Issues	Description	Workaround/Solution	To be fixed version
Webserver Demo Google search page	Search fails	Unknown	Unknown

Requirements

Software

Notes :

list of software which was used to generate the design

Software	Version	Note
Windows 10	2004 / 19041
Libero Release	12.4
SoftConsole	6.2	Included in the Libero installation
Microsemi Flash Pro 5 module driver	2.10.0.0	Utilize onboard programmer and USB / comport connection. Included in the Libero installation
FTDI Driver for the TEM0002 module	2.12.28.0
UART / COM-port terminal		Capturing the modules messages
Web browser		Optional for the Demo Webserver, an ordinary Web browser (supporting MS-HTML > 6.0)

Hardware

Notes :

list of hardware which was used to generate the design

Design supports following modules:

Module Model	Board Part Short Name	PCB Revision Support	DDR	embedded SRAM	embedded Flash	Notes
TEM0002-01-010C	SmartBerry	REV01	1 GBit / 128 MB	64 kB	256 kB	NA

Additional hardware Requirements:

Additional Hardware	Notes
Demo host computer	Demo was created and tested on windows
Micro USB to USB Type A Cable	Power supply, JTAG: Programming the board, UART: Communication Interface to the board.
ETH cable	Hardware for the Demo Webserver.
Router / LAN to USB bridge	Hardware for the Demo Webserver.

Content

Notes :

content of the zip file

Content of the zip archive "TEM0002-SmartBerry_Webserver-Demo_Libero-X.y_Datum-Time":

Design Sources

Type

Location

Notes

Libero

<zip archive>
/ Libero-X.y_Referenz-Design_XY

Libero Project containing the modules
Hardware Reference Design

SoftConsole

<zip archive>
      / Softconsole-X.y-Workspace
            / Smartberry_Hello_World_X.y
            / Smartberry_Webserver_X.y
            / Smartberry_Webserver_DDR_X.y

SoftConsole Workspace
contains the Software Projects :

Hello_World

and two variants of the Demo :

Smartberry_Webserver

SoftConsole

<zip archive>
/ Softconsole-X.y-Workspace
/ microsemi-smartfusion2-smartberry-ddr .cfg

Board configuration file, needed to

debug / run applications

Download

The Trenz Electronic Reference Designs and Demos are usable with the specified Microsemi Libero / SoftConsole version. Usage of a different Microsemi Libero / SoftConsole software versions is not recommended.

Important set new Libero version link on every Design update of new Libero version!
Set Link to download folder (Remove ../de/.. ../en/.. from url) for example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0712/Reference_Design/2018.2/test_board

Reference Designs / Demos are available via the following link:

TEM0002_Reference Designs/Demos

The download is a ZIP compressed archive. Extract the archive before usage.

Design Flow

Notes :

Basic Design Steps
Add/ Remove project specific description

The Hardware and Software Reference / Demo -Designs Projects are available as a prebuild zip archive. The archive contains a Libero Hardware Project and a SoftConsole Workspace folder, they were created and tested in windows environment.

This SoftConsole Workspace contains the Software Project Hello World and the Demo Webserver, the demo is offered in two variants. The board configuration file "microsemi-smartfusion2-smartberry-ddr.cfg" is required for the usage of the Software projects via the IDE SoftConsole.

Launch

Note:

Programming and Startup procedure

Executing a Reference / Demo Design on a module requires the powering of it and a JTAG or UART Connection for Programming and Communication. Often the programming is a two fold process, where the first programming configures the FPGA and the second programming flashes Software code to be executed inside the FPGA / ARM processor.

Connecting

Connect the modules micro USB connector to your host pc, this enables the powering of the module and a simultaneous JTAG and UART connection .

Only necessary for running the Demo Webserver:
The demo is configured to establish a network connection via the DHCP protocol, therefore, if a a free router port is used, no further port setup is required.
If a "direct Ethernet Connection" between Host PC and module is used, the user must know how to setup this connection type. Further down in this chapter is explained how to setup the Demo Webserver and recompile it, so that it uses a static IP.

Driver check

When the module is connected via USB cable to your demo host computer, in the Windows Device Manager appear the following tree board driver related devices:

In section Ports (COM & LPT):

FlashPro5 Port (ComX)

In section Universal Serial Bus controllers:

USB FP5 Serial Converter A
USB FP5 Serial Converter B

The Device Manager is accessible via "Right mouse click context menu" from the Windows Start Menu Button. When these devices are not visible, the driver installation through libero could be faulty.

Programming the Hardware design

Programming of the Hardware reference Design requires to open the FPGA Design IDE Libero

Public Docs > TEM0002 Webserver Demo1 > image2020-9-24_11-58-21.png

The Hardware Reference Design can be opened via "Project > Open Project" in the top right corner of Libero (picture above - upper green rectangle). A file dialogue opens, point the dialogue along the extracted download to the folder containing the Hardware Reference Design.

Disk :\ Path-to-the-Demo-archive \ Extracted ZIP-archive \ Libero-X.y_Referenz-Design\

Double left mouse click onto the project file "Referenz-Design_XY .prjx" to open it. The board is automatically selected and setup to be flashed by Libero.

In the upper left section of Libero, select the tab "Design Flow" (picture above - lover green rectangle) and flash it to the board via "Program Design > and double left mouse click onto "Run PROGRAM Action" (picture above - row with blue background).

Warnings should not affect the functionality of a Reference / Demo -Design.

UART connection

Before flashing any Software Project to the module, open a comport terminal to the boards comport, so that it's messages can be captured.

Programming a Software project

Open SoftConsole and press "Browse..." near the right edge. A file dialogue opens, point the dialogue along the extracted download to the folder containing the SoftConsole Workspace.

Disk :\ Path-to-the-Demo-archive \ Extracted ZIP-archive \ Softconsole-X.y-Workspace \

Confirm your selectioin by pressing "Ok" , the dialogue closes, and open The SoftConsole by pressing "Launch"

Public Docs > TEM0002 Webserver Demo1 > image2020-11-19_13-26-59.png

Subsequently the program opens and shows the software project's who are contained inside the workspace to the left, under "Project Explorer".

Public Docs > TEM0002 Webserver Demo1 > image2020-10-5_13-57-14.png

To simply run a Project, press the triangle right to the button marked with a "R" in the picture above and select a variant of the demo.

Pressing the triangle next to the button marked with "D" let you select which variant to be executed in debug mode.

Debug controls - Resume - Pause - Stop

Public Docs > TEM0002 Webserver Demo1 > image2020-9-24_14-20-15.png

Switch between Debug and Run perspective (upper right corner program window)

System Design - Libero

Note:

Description of Block Design, Constrains... BD Pictures from Export...

Smart Design

Public Docs > TEM0002 Webserver Demo1 > image2020-11-19_13-45-3.png

Constrains

# Microsemi I/O Physical Design Constraints file

# User I/O Constraints file 

# Version: v12.4 12.900.0.16

# Family: SmartFusion2 , Die: M2S010 , Package: 400 VF

# Date generated: Mon Nov 16 11:11:16 2020 


# 
# User Locked I/O Bank Settings
# 


# 
# Unlocked I/O Bank Settings
# The I/O Bank Settings can be locked by directly editing this file
# or by making changes in the I/O Attribute Editor
# 


# 
# User Locked I/O settings
# 

set_io Eth_LED1A \
-pinname Y10 \
-fixed yes \
-DIRECTION OUTPUT


set_io Eth_LED1B \
-pinname U12 \
-fixed yes \
-DIRECTION OUTPUT


set_io Eth_LED2A \
-pinname V14 \
-fixed yes \
-DIRECTION OUTPUT


set_io Eth_LED2B \
-pinname U14 \
-fixed yes \
-DIRECTION OUTPUT


set_io GLED \
-pinname G17 \
-fixed yes \
-DIRECTION OUTPUT


set_io GPIO_5_F2M_taster_S4 \
-pinname E17 \
-fixed yes \
-DIRECTION INPUT


set_io GPIO_6_F2M_taster_S5 \
-pinname E16 \
-fixed yes \
-DIRECTION INPUT


set_io MAC_GMII_MDC \
-pinname N1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io PHY_LED0 \
-pinname U11 \
-fixed yes \
-DIRECTION INPUT


set_io PHY_LED1 \
-pinname T14 \
-fixed yes \
-DIRECTION INPUT


set_io PHY_MDIO \
-pinname N2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INOUT


set_io {PHY_RD[0]} \
-pinname K5 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_RD[1]} \
-pinname H1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_RD[2]} \
-pinname H2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_RD[3]} \
-pinname J4 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io PHY_RESETN \
-pinname R13 \
-fixed yes \
-DIRECTION OUTPUT


set_io PHY_RX_CTL \
-pinname K1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io {PHY_TD[0]} \
-pinname L1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io {PHY_TD[1]} \
-pinname M2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io {PHY_TD[2]} \
-pinname M1 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io {PHY_TD[3]} \
-pinname M3 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io PHY_TX_CTL \
-pinname K3 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT


set_io RGB_B \
-pinname H6 \
-fixed yes \
-DIRECTION OUTPUT


set_io RGB_G \
-pinname F6 \
-fixed yes \
-DIRECTION OUTPUT


set_io RGB_R \
-pinname H5 \
-fixed yes \
-DIRECTION OUTPUT


set_io RLED \
-pinname G16 \
-fixed yes \
-DIRECTION OUTPUT


set_io RXC \
-pinname J2 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION INPUT


set_io TXC \
-pinname K7 \
-fixed yes \
-iostd LVCMOS15 \
-DIRECTION OUTPUT



# 
# Dedicated Peripheral I/O Settings
# 


# 
# Unlocked I/O settings
# The I/Os in this section are unplaced or placed but are not locked
# the other listed attributes have been applied
# 


#
#Ports using Dedicated Pins

#

set_io DEVRST_N \
-pinname U17 \
-DIRECTION INPUT

Software Design - SoftConsole

Note:

optional chapter separate
sections for different apps

Application

----------------------------------------------------------

FPGA Example

scu

MCS Firmware to configure SI5338 and Reset System.

srec_spi_bootloader

TE modified 2019.2 SREC

Bootloader to load app or second bootloader from flash into DDR

Descriptions:

Modified Files: blconfig.h, bootloader.c
Changes:
- Add some console outputs and changed bootloader read address.
- Add bugfix for 2018.2 qspi flash

xilisf_v5_11

TE modified 2019.2 xilisf_v5_11

Changed default Flash type to 5.

----------------------------------------------------------

Zynq Example:

zynq_fsbl

TE modified 2019.2 FSBL

General:

Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\
General Changes:
- Display FSBL Banner and Device ID

Module Specific:

Add Files: all TE Files start with te_*
- READ MAC from EEPROM and make Address accessible by UBOOT (need copy defines on uboot platform-top.h)
- CPLD access
- Read CPLD Firmware and SoC Type
- Configure Marvell PHY

zynq_fsbl_flash

TE modified 2019.2 FSBL

General:

Modified Files: main.c
General Changes:
- Display FSBL Banner
- Set FSBL Boot Mode to JTAG
- Disable Memory initialisation

ZynqMP Example:

----------------------------------------------------------

zynqmp_fsbl

TE modified 2019.2 FSBL

General:

Modified Files: xfsbl_main.c, xfsbl_hooks.h/.c, xfsbl_board.h/.c(search for 'TE Mod' on source code)
Add Files: te_xfsbl_hooks.h/.c (for hooks and board)\n\
General Changes:
- Display FSBL Banner and Device Name

Module Specific:

Add Files: all TE Files start with te_*
- Si5338 Configuration
- ETH+OTG Reset over MIO

zynqmp_fsbl_flash

TE modified 2019.2 FSBL

General:

Modified Files: xfsbl_initialisation.c, xfsbl_hw.h, xfsbl_handoff.c, xfsbl_main.c
General Changes:
- Display FSBL Banner
- Set FSBL Boot Mode to JTAG
- Disable Memory initialisation

zynqmp_pmufw

Xilinx default PMU firmware.

----------------------------------------------------------

General Example:

hello_te0820

Hello TE0820 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

Demo - Webserver_...

The demo projects "Smartberry_Webserver_X.y" and "Smartberry_Webserver_DDR_X.y" are identical variants of the demo, they only differ in their memory location:

Smartberry_Webserver_X.y - Application code is stored to the FPGA's embedded non-volatile memory (eNVM)
Smartberry_Webserver_DDR_X.y - Application code is stored to the FPGA's external volatile memory (DDR3/L SDRAM) and lost during power down

UART output:

Public Docs > TEM0002 Webserver Demo1 > image2020-9-24_15-11-40.png

Static IP configuration

Public Docs > TEM0002 Webserver Demo1 > image2020-10-5_14-4-10.png

To disengaging the DHCP mode one has to setup up an IP and Gateway Address in the code unit "main.c" roughly at line 270. Alternativly, the demo hosts IP Address can be changed.

Furthermore the corresponding compiler flag needs to be deleted in the project setting. To do so, in the "Project Explorer" tab, right mouse click onto the project and select Properties in the appearing menu.

Public Docs > TEM0002 Webserver Demo1 > image2020-9-25_10-57-12.png

In the left section of the properties window select "C/C++ Build > Settings" in the right section select the tab "Tool Settings > GNU ARM Cross C Compiler > Preprocessor" under "Defined symbols (-D)" delete the compiler flag "NET_USE_DHCP" and press "Apply". Confirm the following dialogue and press "Cancel".

Lastly, the project needs to be recompiled. In the top menu of the SoftConsole select "Project > Build ALL / Build Project".

Warnings should not affect the demo. can be ignored.

Reference Design - HelloWorld_...

Hello World example as endless loop instead of one console output. Each loop lights up each LED. The user buttons responds with a message at any time.

UART output:

Public Docs > TEM0002 Webserver Demo1 > image2020-11-19_14-7-14.png

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision got to "Change History" of this page and select older document revision number.

Note this list must be only updated, if the document is online on public doc!
It's semi automatically, so do following
- Add new row below first
- Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template
- Metadata is only used of compatibility of older exports

Date	Document Revision	Authors	Description
			Download Link update
2021-01-29	v.45	John Hartfiel	Link updates table of content update
2020-11-24	v.41	Kilian Jahn	Libero12.4 release
--	all		--

Overview

Key Features

Revision History

Release Notes and Know Issues

Requirements

Software

Hardware

Content

Design Sources

Download

Design Flow

Launch

Connecting

Driver check

Programming the Hardware design

UART connection

Programming a Software project

System Design - Libero

Smart Design

Constrains

Software Design - SoftConsole

Application

scu

srec_spi_bootloader

xilisf_v5_11

zynq_fsbl

zynq_fsbl_flash

zynqmp_fsbl

zynqmp_fsbl_flash

zynqmp_pmufw

hello_te0820

u-boot

Demo - Webserver_...

Static IP configuration

Reference Design - HelloWorld_...

Appx. A: Change History and Legal Notices

Document Change History

Legal Notices

Table of contents