Template Revision 2.12
- Module: TRM Name always "TE Series Name" +TRM
Example: "TE0728 TRM" - Carrier: TRM Name usually "TEB Series Name" +TRM
Example: "TEB0728 TRM"
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Table of Contents |
Overview
The Trenz Electronic TEM0707 is an industrial-grade module for 4 x 5 Trenz Electronic modules. The TEB0707 is integrated with an Intel MAX10 FPGA and it is equipped with a Micro USB2.0 Socket, RJ45 LAN Socket, Micro USB A Socket, Micro SD Card Socket, Low and High Speed Board to Board Connectors, User LEDs, FTDI, Push Buttons and DIP Switch for controlling the SoM.
Refer to http://trenz.org/teb0707-info for the current online version of this manual and other available documentation.
Key Features
Note: 'description: Important components and connector or other Features of the module → please sort and indicate assembly options Key Features' must be split into 6 main groups for modules and mainboards: - SoC/FPGA
- Package: SFVC784
- Device: ZU2...ZU5*
- Engine: CG, EG, EV*
- Speed: -1LI, -2LE,*, **
- Temperature: I, E,*, **
- RAM/Storage
- Low Power DDR4 on PS
- Data width: 32bit
- Size: def. 2GB*
- Speed:***
- eMMC
- Data width: 8Bit
- size: def. 8GB *
- QSPI boot Flash in dual parallel mode (size depends on assembly version)
- Data width: 8bit
- size: def. 128MB *
- HyperRAM/Flash (optional, default not assembled)
- MAC address serial EEPROM with EUI-48™ node identity (Microchip 24AA025E48)
- On Board
- Lattice LCMXO2
- PLL SI5338
- Gigabit Ethernet transceiver PHY (Marvell Alaska 88E1512)
- Hi-speed USB2 ULPI transceiver with full OTG support (Microchip USB3320C)
- Interface
- 132 x HP PL I/Os (3 banks)
- ETH
- USB
- 4 GTR (for USB3, Sata, PCIe, DP)
- MIO for UART
- MIO for SD
- MIO for PJTAG
- JTAG
- Ctrl
- Power
- 3.3V-5V Main Input
- 3.3V Controller Input
- Variable Bank IO Power Input
- Dimension
- Notes
- * depends on assembly version
- ** also non low power assembly options possible
- *** depends on used U+ Zynq and DDR4 combination
Key Features' must be split into 6 main groups for carrier: - Modules
- TE0808, TE807, TE0803,...
- RAM/Storage
- On Board
- Interface
- E.g. ETH, USB, B2B, Display port
- Power
- E.g. Input supply voltage
- Dimension
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- Modules
- RAM/Storage
- EEPROM (FTDI Configuration)
- On Board
- Intel Max 10 FPGA
- FTDI FT2223
- 8x Green User LEDs
- DIP Switch
- Push Buttons
- Interface
- Gigabit RJ45 LAN socket
- SD Card socket
- Micro USB2.0 Socket
- Micro USB A Socket
- 3x High Speed B2B Connectors
- 3x CRUVI Connectors
- 1x Low Speed B2B Connector
- 4x Jumpers
- Power
- Dimension
- Notes
Block Diagram
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Main Components
Notes : - Picture of the PCB (top and bottom side) with labels of important components
- Add List below
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- Barrel Jack Power Supply, J1
- Voltage Regulator, U1
- Micro SD Card Socket, J8
- Micro USB2.0 Socket, J15
- FT2232H FTDI, U8
- USB A Socket, J9
- RJ45 LAN Socket, J2
- SDIO Port Expander, U4
- Jumpers, J4...7
- Push Button (Reset), S2
- DIP Switch, S1
- High Speed B2B Connector, JB3
- High Speed B2B Connector, JB2
- High Speed B2B Connector, JB1
- Intel MAX 10 FPGA, U6
- High speed B2B Connector, J10
- High speed B2B Connector, J11
- High speed B2B Connector, J12
- Low Speed Connector, J13
- User Push Button, S3
- Jumper, J3
Initial Delivery State
Notes : Only components like EEPROM, QSPI flash can be initialized by default at manufacture. If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
Storage device name | Content | Notes |
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EEPROM | Programmed | FTDI Configuration |
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Configuration Signals
- Overview of Boot Mode, Reset, Enables.
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MODE Signal State | Boot Mode |
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MODE | SoM Mode control pin (depnds on SoM) | PROGMODE | - select between CPLD (low, closed, on)
- on SoM or FPGA/SoC (high, open, off )
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Signal | B2B | I/O | Note |
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RESIN | JB2- 17 | Out | SoM Module |
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Signals, Interfaces and Pins
Notes : - For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
FPGA Bank | B2B Connector | I/O Signal Count | Voltage Level | Notes |
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CRUVI B2B Connectors
The TEMB0707 is equipped with a Low Speed Connectors J 13 and three High Speed Connector J10...12. These connectors are provided for CRUVI extension cards. More information is provided in the B2B Connectors section.
Speed | Designators | Schematic | Connected to | Notes |
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Low | J6 | A_X0...1 | B2B, J11 | GPIO |
| A_X2...5 | B2B, J11 | SC SPI |
| A_X6...7 | B2B, J11 | I2C0 SDA/SCL |
| B_X0...7| | B2B, J11 | GPIO |
| C_X0...7 | B2B, J11 | GPIO | High | J5 | A0...A5 (N/P) | B2B, J11 |
| B0...B5 (N/P) | B2B, J11 |
| MODE | B2B, J11 |
| RESET | B2B, J11 |
| SMB_ALERT SMB_SDA SMB_SCL | B2B, J11 |
| DI,DO,SCK,SEL | B2B, J11 | SPI | HSIO, HI, HO | B2B, J11 |
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JTAG Interface
JTAG access to the attached SoM through B2B connector JB2. The JTAG Enable is connected to VCC and after power on it will be enable.
JTAG Signal | B2B Connector |
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M_TMS | JB2-94 | M_TDI | JB2-96 | M_TDO | JB2-100 | M_TCK | JB2-98 | VCCJTAG | JB2-92 |
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There is an Intel MAX10 provided on TEB0707 as CPLD and JTAG access to the Intel MAX10 SoC is provided through the FTDI U8.
JTAG Signal | Connected to |
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M_TMS | FTDI (U8) - ADBUS3 | M_TDI | FTDI (U8) - ADBUS1 | M_TDO | FTDI (U8) - ADBUS2 | M_TCK | FTDI (U8) - ADBUS0 |
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Micro USB2.0
There is a USB2.0 Socket, J15 provided in order to communicate with the FTDI, U8. Data signals from USB2.0 are passed through a Line Filter L4 and a Diode U9 in order to be protected against inverse polarity connection.
Pin | Schematic | Connected to | Notes |
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ID | N.C | N.C |
| D+ | USB_P | FTDI, U8 | Through Line Filter, L4 | D- | USB_N | FTDI, U8 | Through Line Filter, L4 | Vbus | VBUS | Diode, U9 |
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Micro USB A
Pin | Schematic | Connected to | Notes |
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ID | N.C | N.C |
| D+ | DL_P | FTDI, U1 | Through Line Filter, L1 | D- | DL_N | FTDI, U1 | Through Line Filter, L1 | Vbus | VBUS | Diode, U2 |
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RJ45 LAN Socket
There is a RJ45 Ethernet LAN Socket, J2 connected to B2B, JB1 via 4x channels data receive and transmit.
Pin | Schematic | Connected to | Notes |
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2 | PHY_MDI0_P | B2B, JB1 |
| 3 | PHY_MDI0_N | B2B, JB1 |
| 4 | PHY_MDI1_P | B2B, JB1 |
| 5 | PHY_MDI1_N | B2B, JB1 |
| 6 | PHY_MDI2_P | B2B, JB1 |
| 7 | PHY_MDI2_N | B2B, JB1 |
| 8 | PHY_MDI3_P | B2B, JB1 |
| 9 | PHY_MDI3_N | B2B, JB1 |
| VCC | ETH-VCC | B2B, JB1 |
| Green LED | ETH1_LED0 | Intel MAX 10, U6 | Link/Activity indicator | Yellow LED | ETH1_LED1 | Intel MAX 10, U6 | Speed indicator |
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Test Points
you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section. Example: Test Point | Signal | B2B | Notes |
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10 | PWR_PL_OK | J2-120 |
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Test Point | Signal | Connected to | Notes |
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TP1 | 3.3V | Regulator, U1 |
| TP2 | VIN | Voltage Protection, U2 |
| TP4 | IOV | Regulator, U3 |
| TP5 | 3.3V | Power Switch, Q1 |
| TP6 | C5VIN | Power Switch, Q2 |
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On-board Peripherals
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
Chip/Interface | Designator | Notes |
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Intel MAX 10 | U6 |
| FTDI | U8 |
| SDIO Expander | U4 |
| EEPROM | U10 |
| Oscillator | U7 |
| LEDs | D1...8 |
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Quad SPI Flash Memory
Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
MIO Pin | Schematic | U?? Pin | Notes |
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EEPROM
MIO Pin | Schematic | U?? Pin | Notes |
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MIO Pin | I2C Address | Designator | Notes |
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LEDs
Designator | Color | Connected to | Active Level | Note |
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EEPROM
Pin | Schematic | Connected to | Notes |
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CS | EECS | FTDI, U8 |
| CLK | EECLK | FTDI, U8 |
| DIN | EEDATA | FTDI, U8 |
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I2C Address | Designator | Notes |
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A0 | U15 |
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Ethernet
U?? Pin | Signal Name | Connected to | Signal Description | Note |
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Clock Sources
Designator | Description | Frequency | Note |
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| KHz |
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Programmable Clock Generator
There is a programmable clock generator on-board (U??) provided in order to generate variable clocks for the module. Programming can be done using I2C via PIN header J??. The I2C Address is 0x??.
U?? Pin
| Signal | Connected to | Direction | Note |
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IN0 |
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| IN2 |
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| IN3 |
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| XAXB |
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| SCLK |
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| SDA |
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| OUT0 |
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| OUT1 |
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| OUT2 |
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| OUT3 |
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| OUT4 |
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| OUT5 |
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| OUT6 |
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| OUT7 |
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| OUT8/OUT9 |
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Power and Power-On Sequence
In 'Power and Power-on Sequence' section there are three important digrams which must be drawn: - Power on-sequence
- Power distribution
- Voltage monitoring circuit
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Power Supply
Power supply with minimum current capability of xx A for system startup is recommended.
Power Consumption
Power Input Pin | Typical Current |
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VIN | TBD* |
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* TBD - To Be Determined
Power Distribution Dependencies
Power-On Sequence
Voltage Monitor Circuit
Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
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Power Rails
Power Rail Name | B2B Connector JM1 Pin | B2B Connector JM2 Pin | B2B Connector JM3 Pin | Direction | Notes |
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Bank Voltages
Board to Board Connectors
- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
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Technical Specifications
Absolute Maximum Ratings
Symbols | Description | Min | Max | Unit |
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| V |
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Recommended Operating Conditions
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Parameter | Min | Max | Units | Reference Document |
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| V | See ???? datasheets. |
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| °C | See Xilinx ???? datasheet. |
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Physical Dimensions
PCB thickness: 1.7 mm.
Currently Offered Variants
Revision History
Hardware Revision History
Date | Revision | Changes | Documentation Link |
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2020-04-01 | REV01 | Initial Release |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
Document Change History
- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
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Date | Revision | Contributor | Description |
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Disclaimer