Template Revision 2.9 - on construction Design Name always "TE Series Name" + optional CPLD Name + "CPLD"
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Lattice MachXO2-4000HC is a CPLD chip, that is used in TEB0912 board as a system management controller. The system controller implements power management same as power sequencing, monitoring the input current and output of regulators. Rather than power management is the system controller responsible for reset generation, zynq initial configuration, communication between temperture sensors and FPGA. The system controller contains of some additional features same as watchdog timer, i2c interface, CAN bus and SMbus. The firmware of CPLD contains of various subsystems same as i2c master and i2c slave. I2c master reads the data from one current sensor and 7 temperature sensors , that measure the temperature of DC-DC converter chips. I2c slave is responsible for communicating with FPGA to write the measured data in FPGA.
See Document Change History
Name / opt. VHD Name | Direction | Pin | Pullup/Down | Bank Power | Description |
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ALERT_N | in | B33 | UP | +3.3V_STB | Digital output . Interrupt or SMBus alert output of temperature sensors. Can be configured as a second THERM output. (Pulled up) [U43,U47,U52,U57,U4](TMP461AIRUNT),U61(LM96163CISD/NOPB) |
CPLD_DEBUG0 | out | A41 | UP | +3.3V_STB | |
CPLD_DEBUG1 | out | A2 | UP | +3.3V_STB | |
CPLD_DEBUG2 | out | B1 | UP | +3.3V_STB | |
CPLD_DEBUG3 | out | A3 | NONE | +3.3V_STB | |
CPLD_HD0 | ? | B3 | UP | +3.3V_STB | |
CPLD_HD1 | ? | B28 | UP | +3.3V_STB | |
EN_VCCINT | out | B22 | DOWN | +3.3V_STB | Enable pin for +0.85V DC-DC converter (LTM4630EY-U42A) |
EN_VTT_DDR | out | A22 | DOWN | +3.3V_STB | Enable pin for 2A Peak Sink/Source DDR Termination Regulator (TPS51206-U2, U3) |
EN+0.85V_GT_AVCC_PS | out | B21 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator (TPS74801DRC-U45) |
EN+0.9V_GT_AVCC | out | B14 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +0.9V output voltage (LTM4644EY-U44) |
EN+1.0V | out | A46 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +1.0V output voltage (TPS74801DRC-U13) |
EN+1.2V_DDR | out | A34 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U53) |
EN+1.2V_GT_AVTT | out | B16 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U48) |
EN+1.2V_PLL_PS | out | A15 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator (TPS74801DRC-U46) |
EN+1.3V_MGT_PS | out | B15 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.37V output voltage (LTM4644EY-U44) |
EN+1.8V | out | B13 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +1.8V output voltage (LTM4644EY-U53) |
EN+1.8V_AUX | out | A30 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U49,U50,U51) |
EN+1.8V_GT_AVTT_PS | out | B20 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U54) |
EN+2.5V_DDR | out | A44 | DOWN | +3.3V_STB | Enable pin for 1.5A low-dropout linear regulator with +2.5V output voltage (TPS74801DRC-U55, U56) |
EN+2V_MGT_PS | out | A21 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +2.0V output voltage (LTM4644EY-U48) |
EN+3.3V | out | B18 | DOWN | +3.3V_STB | Enable pin for quad DC-DC microModule regulator with configurable 4A output array for +3.3V output voltage (LTM4644EY-U1) |
EN+5V_BIAS | out | A17 | DOWN | +3.3V_STB | Enable pin for low dropout linear regulator with +5V output voltage (ADP7102ACPZ-U58) |
EXT_STATUS_LED_G | out | B9 | NONE | +3.3V_STB | External status LED green (J40-Pin2) |
EXT_STATUS_LED_R | out | A25 | NONE | +3.3V_STB | External status LED red (J40-Pin3) |
FAN_EN | out | B29 | UP | +3.3V_STB | Enables a smart high-side power switch to drive the FAN (BTS41411N-U60) |
FPGA_DONE | in | A24 | UP | +3.3V_STB | FPGA PL configuration done indicator |
FTDI_PWR_EN_N | in | A36 | UP | +3.3V_STB | Active low power enable output of FTDI chip (FT2232H56Q-U38) |
FTDI_RX | out | A35 | NONE | +3.3V_STB | UART RXD of FTDI chip (FT2232H56Q-U38) |
FTDI_TCK | in | A45 | NONE | +3.3V_STB | FTDI JTAG clock pin (FT2232H56Q-U38) |
FTDI_TDI | in | A47 | NONE | +3.3V_STB | FTDI JTAG data input pin (FT2232H56Q-U38) |
FTDI_TDO | out | A48 | NONE | +3.3V_STB | FTDI JTAG data output pin (FT2232H56Q-U38) |
FTDI_TMS | in | B34 | NONE | +3.3V_STB | FTDI JTAG mode select pin (FT2232H56Q-U38) |
FTDI_TX | in | B27 | NONE | +3.3V_STB | UART TXD of FTDI chip (FT2232H56Q-U38) |
I2C_SCL_CPLD | inout | B32 | UP | +3.3V_STB | I2C clock pin that connected to all temperature sensors and current sensor |
I2C_SDA_CPLD | inout | A42 | UP | +3.3V_STB | I2C data pin that connected to all temperature sensors and current sensor |
JTAGEN | in | B30 | DOWN | +3.3V_STB | JTAG enable input pin (Dip switch S4-1) |
MIO30_UART0_RXD | A8 | NONE | +1.8V | MIO30 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) | |
MIO31_UART0_TXD | A9 | NONE | +1.8V | MIO31 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) | |
MIO32_UART1_TXD | B8 | NONE | +1.8V | MIO32 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) | |
MIO33_UART1_RXD | B7 | NONE | +1.8V | MIO33 pin of FPGA (XCZU11EG-1FFVC1760I- U30R) | |
MR | out | A26 | UP | +3.3V_STB | Manual-reset that connected to MR pin of ultralow supply-current voltage monitor chip (TPS3106K33DBVR-U73) |
NetU68_B2 | B2 | /currently_not_used | |||
PG_VCCINT | in | B23 | UP | +3.3V_STB | Power good pin for +0.85V DC-DC converter (LTM4630EY-U42A) |
PG+0.85V_GT_AVCC_PS | in | B12 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator for +0.85V output voltage (TPS74801DRC-U45) |
PG+0.9V_GT_AVCC | in | A18 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +0.9V output voltage (LTM4644EY-U44) |
PG+1.0V | in | B35 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.0V output voltage (TPS74801DRC-U13) |
PG+1.2V_DDR | in | A33 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U53) |
PG+1.2V_GT_AVTT | in | A11 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +1.2V output voltage (LTM4644EY-U48) |
PG+1.2V_PLL_PS | in | A28 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator for +1.2V output voltage (TPS74801DRC-U46) |
PG+1.3V_MGT_PS | in | A20 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +0.9V output voltage (LTM4644EY-U44) |
PG+1.8V | in | B25 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +1.8V output voltage (LTM4644EY-U53) |
PG+1.8V_AUX | in | A27 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U50) |
PG+1.8V_AUX_PS | in | B10 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U51) |
PG+1.8V_GT_AUX | in | A13 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U49) |
PG+1.8V_GT_AVTT_PS | in | A16 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +1.8V output voltage (TPS74801DRC-U54) |
PG+2.5V_DDR | in | A32 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +2.5V output voltage (TPS74801DRC-U55) |
PG+2.5V_PL_DDR | in | A38 | UP | +3.3V_STB | Power good pin for 1.5A low-dropout linear regulator with +2.5V output voltage (TPS74801DRC-U56) |
PG+2V_MGT_PS | in | A1 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array for +2.0V output voltage (LTM4644EY-U48) |
PG+3.3V | in | A23 | UP | +3.3V_STB | Power good pin for quad DC-DC microModule regulator with configurable 4A output array with +3.3V output voltage (LTM4644EY-U1) |
PWR_BTN | in | A12 | UP | +3.3V_STB | Power button input (J40-Pin1) |
PWR_STAT_GRN | out | B24 | NONE | +3.3V_STB | Red LED for power status display ( D11-Red) |
PWR_STAT_RED | out | A31 | NONE | +3.3V_STB | Green LED for power status display (D12-Green) |
SRST_B | inout | B5 | UP | +1.8V | PS software reset (Active Low) (XCZU11EG-1FFVC1769I- U30S) |
TCK | out | A5 | NONE | +1.8V | Zynq JTAG clock pin (XCZU11EG-1FFVC1760I- U30S) |
TDI | out | B4 | NONE | +1.8V | Zynq JTAG data input pin (XCZU11EG-1FFVC1760I- U30S) |
TDO | in | A6 | NONE | +1.8V | Zynq JTAG data output pin (XCZU11EG-1FFVC1760I- U30S) |
THERM_N | in | A40 | UP | +3.3V_STB | Overtemperature termal shutdown pin of temperature sensors ( TMP461, U43,U47,U52,U57,U4) and temperature sensor with integrated fan control (LM96163-U61) |
TMS | out | A7 | NONE | +1.8V | Zynq JTAG mode select pin (XCZU11EG-1FFVC1760I- U30S) |
To get content of older revision got to "Change History" of this page and select older document revision number.
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Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description |
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Work in progress | |||||
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