Template Revision 1.0 - on construction

Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board"

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Important General Note:

  • Export PDF to download, if vivado revision is changed!

  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template (note: inner scroll ignore/only only with drawIO object):

        Create DrawIO object here: Attention if you copy from other page, use

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

      • Table template:

        • Layout macro can be use for landscape of large tables
        • Set column width manually(can be used for small tables to fit over whole page) or leave empty (automatically)

      • ExampleComment

  • ...

Table of contents


Notes :

NIOS II Design with SDRAM controller, flash memory test and different LED sequences.

Refer to http://trenz.org/max1000-info for the current online version of this manual and other available documentation.

Key Features

Notes :

  • Add basic key futures, which can be tested with the design

  • Quartus Prime Lite 19.1
  • SPI
  • UART
  • User Flash memory
  • SDRAM memory
  • 3-axis Accelerometer
  • User LEDs
  • User buttons

Revision History

Notes :

  • add every update file on the download
  • add design changes on description

DateQuartusProject BuiltAuthorsDescription
2020-10-1919.1 Lite



Thomas Dück
  • bugfixes
2020-07-0719.1 Lite



Thomas Dück
  • bugfixes
  • script update
2020-05-1219.1 Lite



Thomas Dück
  • 19.1 update



Thomas Dück
  • add bash files for Linux OS



Thomas Dück
  • create project with TE scripts
  • new assembly variants
2019-04-0218.1TEI0001-03-08-C8-test_board-quartus_18.1-20190402.zipThomas Dück
  • initial release

Release Notes and Know Issues

Notes :
  • add known Design issues and general notes for the current revision
  • do not delete known issue, add fixed version time stamp if  issue fixed

IssuesDescriptionWorkaroundTo be fixed version
No known issues---------



Notes :

  • list of software which was used to generate the design

Quartus Prime Lite19.1needed
NIOS II SBT for eclipse---optional


Notes :

  • list of software which was used to generate the design

Complete List is available on <design_name>/board_files/*_devices.csv

Design supports following modules:

Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
TEI0001-03-08-C808_C8_8MBREV02, REV038MByte64MBitNANA
TEI0001-03-16-C816_C8_8MBREV02, REV038MByte64MBitNA



Design supports following carriers:

Carrier ModelNotes

Additional HW Requirements:

Additional HardwareNotes
USB cable for JTAG/UARTCheck Carrier Board and Programmer for correct type


Notes :

  • content of the zip file

For general structure and of the reference design, see Project Delivery - Intel devices

Design Sources

Quartus<design_name>/source_files/quartusQuartus project will be generated by TE Scripts
Software<design_name>/source_files/softwareAdditional software will be generated by TE Scripts


Notes :

  • prebuilt files
  • Template Table:

    • File



      SOPC Information File*.sopcinfoFile with description of the .qsys file to create software for the target hardware
      SRAM Object File*.sofRam configuration file
      Programmer Object File*.pofFPGA configuration file
      JTAG indirect configuration file*.jicFlash configuration file
      Diverse Reports---Report files in different formats
      Software-Application-File*.elfSoftware application for NIOS II processor system




SOPC Information File*.sopcinfoFile with description of the *.qsys file to create software for the target hardware
Programmer Object File*.pofFPGA configuration file
Diverse Reports---Report files in different formats
Software Application File*.elfSoftware application for NIOS II processor system


Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.

Reference Design is available on:

Design Flow

Notes :
  • Basic Design Steps

  • Add/ Remove project specific description

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch.

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:

The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality

  1. Open create_project_win.cmd/create_project_linux.sh:
    'Create Project' GUI example
  2. Select Board in "Board selection"
  3. Click on "Create project" button to create project
    1. (optional for manual changes) Select correct quartus installation path in "<design_name>/settings/design_basic_settings.tcl"



  • Programming and Startup procedure


Check Module and Carrier TRMs for proper HW configuration before you try any design.

MAX10 Flash

  1. Connect the Module to USB-Port
  2. Open create_project_win.cmd/create_project_linux.sh
  3. Select correct board in "Board selection"
  4. Click on "Program device" button
    1. if prebuilt files are available: select "Program prebuilt file"
    2. using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
    3. (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
  5. Click on "Start program device" button


Not used on this example.


  1. Prepare Hardware like described on section TEI0001 Test Board#Programming
  2. Connect UART USB (most cases same as JTAG)


  1. Open Serial Console (e.g. PuTTY)
    1. COM Port: Win OS see device manager, Linux OS see  dmesg | grep tty  (UART is *USB1)
    2. Speed: 115200
  2. Press reset button on the module
  3. Toggle between following modes by pressing user button
    1. Spirit level
    2. Winbond SPI flash memory test
    3. Shift register sequence
    4. Knightrider sequence
    5. Case statement sequence

System Design - Quartus


  • Description of Block Design - Project, Block Design - Platform Desginer, ... Block Design Pictures from Export...

Block Design

Block Design - test_board.bdf

Block Design - NIOS_test_board.qsys

Software Design - SDK

  • optional chapter separate

  • sections for different apps



General Example:


Hello TEI0006 is a Quartus Hello World example as endless loop instead of one console output.

Template location: <design_name>/source_files/software/


Software example to test TEI0001 module.

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision got to "Change History" of this page and select older document revision number.

  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following
    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports

DateDocument Revision



  • bugfixes
  • script update
2020-05-13v.10Thomas Dück
  • 19.1 release
2019-11-11v.8Thomas Dück
  • add bash files for Linux OS
2019-10-29v.6Thomas Dück
  • change design to TE scripts
  • new variants
2019-04-03v.4Thomas Dück
  • Initial release 18.1



Legal Notices