Template Revision 1.0 - on construction Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board" |
Important General Note:
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This page describes in detail which software, and their respective versions, was used to generate und use the module demonstration. Further described is how to flash the Hardware and Software Design contained in the Demo Archieve onto the TEM0001. A brief usage introduction for each Demo is included.
The Hardware Reference Design uses these Smartfusion 2 SoC, hard Arm® Cortex®-M3 Core, Soft SDRAM Core, Soft SPI Core, COM port, Real Time Clock and the on-board LEDs via a Soft PWM Core.
The Software Designs Hello World, SF2_GNU_SC4_pwm_slow_blink and SF2_GNU_SC4_rtc_time use the Hardware Design features to a different degree. Most notably is Hello World, which utializes all features of the Hardware and is very close to the modules production test.
Refer to TEM0001-Resources for the current online version of this manual and other available documentation.
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Non known so far.
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The Designs were created and tested in the following windows environment.
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Design supports following modules:
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Additional hardware Requirements:
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Important ! :
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The download is a ZIP compressed archive, it needs to be extract before usage.
Recommendation :
The path of the extracted archiev is vital for all IDE's, therefore place the extracted archiev outside the user space, e.g. "c:\Extracted_Archieve" [ Access rights / Path length limit ].
Reference Designs / Demos are available via the following link:
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Content of the zip archive "TEM0001_test-board_Libero-2021.2_20211215123500 .zip" :
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Currently this chapter is not needed for Microsemi projects Chapter - Design Flow
The ... to use these Project ... they are This Demo / Reference Design / The Hardware and Software Reference / Demo -Designs Projects are available as a prebuild zip archive. The archive contains at least a Libero Hardware Project and a SoftConsole Workspace folder, they were created and tested in windows environment. This SoftConsole Workspace contains the Software Project ... <Name-of-the-Software-Project> . The board configuration file "NAME-of-the-Board-config-file .cfg" is required for the usage of the Software projects via the IDE SoftConsole. |
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Executing a Reference / Demo Design on a module requires the powering of it and a JTAG or UART Connection for Programming and Communication. Often the programming is a two fold process, where the first programming configures the FPGA and the second programming flashes Software code to be executed inside the FPGA / ARM processor.
Variant without explicit power connector:
Connect the modules Micro-USB to your host pc, this enables the powering of the module and a simultaneous JTAG and UART connection .
When the module is connected via USB cable to your demo host computer, in the Windows Device Manager appear the following three board driver related devices:
In section Ports (COM & LPT):
In section Universal Serial Bus controllers:
The Device Manager is accessible via "Right mouse click context menu" from the Windows Start Menu Button. When these devices are not visible, the driver installation through libero could be faulty.
Before flashing any design to the module, open a terminal programm (e.g. PuTTY or SmarTTY) to the boards COM port, so that when the module restarts after programming, it's messages can be captured.
The Microsemi Hardware and Software Design Tools, Libero and SoftConsole, incorporate the abillity to edit, debug and program Hardware and Software Designs. This Programming Variant is for you, when you are interessted in this.
To program the Hardware Reference Design, start the FPGA Design IDE "Libero SoC v2021.2".
The Hardware Reference Design can be opened via "Project > Open Project" in the top right corner of Libero (picture above - upper green rectangle). A file dialogue opens, point the dialogue along to the extracted download folder containing the Hardware Design.
Disk :\ Path-to-the-Demo-archive \ Extracted ZIP-archive \ Libero-X.y_Hardware-Design\
Double left mouse click onto the project file "TEM0001_RefDesV02.prjx" to open it. The board is automatically selected and setup to be flashed by Libero.
In the upper left section of Libero, select the tab "Design Flow" (picture above - lover green rectangle) and flash it to the board via "Program Design > and double left mouse click onto "Run PROGRAM Action" (picture above - row with blue background).
Warnings should not affect the functionality of a Reference / Demo -Design.
Open SoftConsole and press "Browse..." near the right edge. A file dialogue opens, point the dialogue along the extracted download to the folder containing the SoftConsole Workspace.
Disk :\ Path-to-the-Demo-archive \ Extracted ZIP-archive \ SoftConsoleX.y_Workspace_TEM0001 \
Confirm your selectioin by pressing "Ok" , the dialogue closes, and open The SoftConsole by pressing "Launch"
Subsequently the program opens and shows the software project's who are contained inside the workspace to the left, under "Project Explorer".
To simply run a Project, press the triangle right to the button marked with a "R" in the picture above and select a variant of the demo.
Pressing the triangle next to the button marked with "D" let you select which variant to be executed in debug mode.
Debug controls - Resume - Pause - Stop
Switch between Debug and Code Writting perspective (upper right corner program window)
Programming or Debugging a Software Design with the IDE SoftConsole needs to be manually stopped, in order to rerun it or to alter to a different Design.
When you just want to run a SoC Design, this is for you.
To program a Hardware and Software Design simultaneously, open FlashPro Express. Via left click onto Open .... in the section "Job Projects" open a file dialogue. Point to
Disk :\ Path-to-the-Demo-archive \ Extracted ZIP-archive \ FlashProExpressX.Y \ Desired Demo \ JobFile . pro
To program the Design, press Run.
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# Microsemi I/O Physical Design Constraints file # User I/O Constraints file # Version: v2021.1 2021.1.0.17 # Family: SmartFusion2 , Die: M2S010 , Package: 400 VF # Date generated: Fri Aug 13 07:56:00 2021 # # User Locked I/O Bank Settings # # # Unlocked I/O Bank Settings # The I/O Bank Settings can be locked by directly editing this file # or by making changes in the I/O Attribute Editor # # # User Locked I/O settings # # # Dedicated Peripheral I/O Settings # set_io CLK1 \ -pinname N16 \ -fixed yes \ -DIRECTION INPUT # # Unlocked I/O settings # The I/Os in this section are unplaced or placed but are not locked # the other listed attributes have been applied # # #Ports using Dedicated Pins # set_io DEVRST_N \ -pinname U17 \ -DIRECTION INPUT set_io XTL \ -pinname Y18 \ -DIRECTION INPUT |
# Microsemi I/O Physical Design Constraints file # User I/O Constraints file # Version: v11.8 11.8.0.26 # Family: SmartFusion2 , Die: M2S010 , Package: 400 VF # Date generated: Fri Oct 20 14:01:01 2017 # # User Locked I/O Bank Settings # # # Unlocked I/O Bank Settings # The I/O Bank Settings can be locked by directly editing this file # or by making changes in the I/O Attribute Editor # # # User Locked I/O settings # set_io {BA[0]} \ -pinname W10 \ -fixed yes \ -DIRECTION OUTPUT set_io {BA[1]} \ -pinname V12 \ -fixed yes \ -DIRECTION OUTPUT set_io CAS_N \ -pinname Y12 \ -fixed yes \ -DIRECTION OUTPUT set_io CKE \ -pinname Y13 \ -fixed yes \ -DIRECTION OUTPUT set_io {CS_N[0]} \ -pinname R13 \ -fixed yes \ -DIRECTION OUTPUT set_io {DQ[0]} \ -pinname F1 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[1]} \ -pinname G1 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[2]} \ -pinname E2 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[3]} \ -pinname G2 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[4]} \ -pinname E3 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[5]} \ -pinname G3 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[6]} \ -pinname F3 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[7]} \ -pinname F4 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[8]} \ -pinname J7 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[9]} \ -pinname G6 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[10]} \ -pinname F6 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[11]} \ -pinname H5 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[12]} \ -pinname H6 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[13]} \ -pinname H4 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[14]} \ -pinname F5 \ -fixed yes \ -DIRECTION INOUT set_io {DQ[15]} \ -pinname G4 \ -fixed yes \ -DIRECTION INOUT set_io {DQM[0]} \ -pinname E5 \ -fixed yes \ -DIRECTION OUTPUT set_io {DQM[1]} \ -pinname F7 \ -fixed yes \ -DIRECTION OUTPUT set_io RAS_N \ -pinname U13 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[0]} \ -pinname U11 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[1]} \ -pinname U12 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[2]} \ -pinname V11 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[3]} \ -pinname Y10 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[4]} \ -pinname W15 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[5]} \ -pinname U14 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[6]} \ -pinname Y15 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[7]} \ -pinname W14 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[8]} \ -pinname T15 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[9]} \ -pinname W13 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[10]} \ -pinname T13 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[11]} \ -pinname V14 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[12]} \ -pinname V15 \ -fixed yes \ -DIRECTION OUTPUT set_io {SA[13]} \ -pinname Y16 \ -fixed yes \ -DIRECTION OUTPUT set_io WE_N \ -pinname R12 \ -fixed yes \ -DIRECTION OUTPUT set_io SDRCLK_OUT \ -pinname T14 \ -fixed yes \ -DIRECTION OUTPUT |
# Microsemi I/O Physical Design Constraints file # User I/O Constraints file # Version: v2021.1 2021.1.0.17 # Family: SmartFusion2 , Die: M2S010 , Package: 400 VF # Date generated: Sat Jul 24 11:29:36 2021 # # User Locked I/O Bank Settings # # # Unlocked I/O Bank Settings # The I/O Bank Settings can be locked by directly editing this file # or by making changes in the I/O Attribute Editor # # # User Locked I/O settings # set_io SPISCLKO \ -pinname P18 \ -fixed yes \ -DIRECTION OUTPUT set_io SPISDI \ -pinname K16 \ -fixed yes \ -DIRECTION INPUT set_io SPISDO \ -pinname P19 \ -fixed yes \ -DIRECTION OUTPUT set_io SPISS \ -pinname K15 \ -fixed yes \ -DIRECTION OUTPUT |
# SMF2000 Board Pinout, 2018-11-27 # LED1-LED8 set_io {PWM[0]} -pinname E18 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[1]} -pinname R17 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[2]} -pinname R18 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[3]} -pinname T18 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[4]} -pinname U18 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[5]} -pinname R16 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[6]} -pinname E1 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 set_io {PWM[7]} -pinname D2 -fixed yes -iostd LVCMOS33 -OUT_DRIVE 16 #USER_LED set_io {USER_LED} -pinname G17 -fixed yes -iostd LVCMOS33 -DIRECTION OUTPUT # USER_BTN set_io taster -pinname B19 -fixed yes -iostd LVCMOS33 -RES_PULL Up |
create_clock -name {FCCC_C0_0__FCCC_C0_0__GL0_net} -period 10 -waveform {0 5 } [ get_nets { FCCC_C0_0/FCCC_C0_0/GL0_net } ] create_clock -name {FCCC_C1_0__GL0_net} -period 250 -waveform {0 125 } [ get_nets { FCCC_C1_0/FCCC_C1_0/GL0_net } ] create_clock -name {XTL} -period 83.3333 -waveform {0 41.6667 } [ get_ports { XTL } ] create_clock -name {OSC_C0_0__OSC_C0_0__RCOSC_25_50MHZ_O2F} -period 20 -waveform {0 10 } [ get_pins { FCCC_C0_0/FCCC_C0_0/CCC_INST/RCOSC_25_50MHZ } ] create_clock -name {CLK1} -period 83.3333 -waveform {0 41.6667 } [ get_ports { CLK1 } ] |
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---------------------------------------------------------- General Example: hello_te0820 Hello TE0820 is a Xilinx Hello World example as endless loop instead of one console output. u-boot U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.
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Software Designs contained insode the workspace.
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The Hello World utializes all features of the Hardware. It runs an endless loop, which interacts with the modules periphy in each loop. It is very close to the modules production test.
TEM0001-01B : "Hello world!" - Loop : 1 RTC-Time : 0:00:00:00 (Day, hour, minute, second) SPI Flash - Reding JEDEC specs : Device ID : 0X16 Manufacturer ID : 0XEF, Winbond Device capacity : 0X17, 8 MB Device type : 0X40 SDRam test : Initializing 5% cells to random values, seed = 139 Checking from 0XA0000000 to 0XA0400000 in steps of 19 Result this loop - SUCCESSFULL All 1 Test Cycles - FLAWLESS |
This software design illuminates the User LED D10. The User LED D2 transitions between illuminated and off continuously.
Resambles a clock with time and date. Time and Date can be set.
******************************************************************** ************** SmartFusion2 RTC Calendar Time Example ************** ******************************************************************** This example project reads the time from the SmartFusion2 RTC. A simple command line interface allows the following operations: - Set the RTC time by pressing "t" - Set the RTC date by pressing "d" -------------------------------------------------------------------- Saturday January 1 2000 (week 1) 00:00:34 |
To edit the time press t or d for the date, confirm via Enter. The program alters to setup mode. Changing the values for hour, minute and second is done independently for each value, enter a valid value and press Enter. When all values are entered, the new values are accepted . A non valid value will terminate the setup mode.
To get content of older revision got to "Change History" of this page and select older document revision number.
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