Design Name always "TE Series Name" + Design name, for example "TEI0006 Test Board" Date | Version | Changes | Author |
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| 2022-02-28 | 2.0 | - add yocto to
- Overview → Key Features
- Overview → Requirements
- Design Flow
- Launch
- add section 'Software Design - Yocto'
| TD | 2021-06-15 | 1.2 | - table of content view
- template history
- placed a horizontal separation line under each chapter heading
- replaced <design name> by <project folder>
- changed title-alignment for tables from left to center
- update 19.x to 20.x
| JH,TD | 2020-11-24 | 1.1 | - add fix table of content
- add table size as macro
| JH | -- | 1.0 | -- | -- |
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Important General Note: Export PDF to download, if quartus revision is changed! Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro - Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
- ...
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Overview
Refer to http://trenz.org/cr00100-info for the current online version of this manual and other available documentation.
Key Features
Notes : - Add basic key futures, which can be tested with the design
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- Quartus 20.1 Lite
- NIOS II
- UART
- SDRAM memory
- User Buttons
- User LED
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Revision History
Notes : - add every update file on the download
- add design changes on description
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Date | Quartus | Project Built | Authors | Description |
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2021-02-25 | 20.1 Lite | CR00100-test_board_noprebuilt-quartus_20.1.1-20220225103813.zip CR00100-test_board-quartus_20.1.1-20220225104254.zip | Thomas Dück | |
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Release Notes and Know Issues
Notes :- add known Design issues and general notes for the current revision
- do not delete known issue, add fixed version time stamp if issue fixed
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Issues | Description | Workaround | To be fixed version |
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No known issues | --- | --- | --- |
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Requirements
Software
Notes : - list of software which was used to generate the design
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Software | Version | Note |
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Quartus Prime Lite | 20.1 | needed | NIOS II SBT for Eclipse | --- | optional |
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Hardware
Notes : - list of hardware which was used to generate the design
- mark the module and carrier board, which was used tested with an *
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Complete List is available on <project folder>/board_files/*_board_files.csv
Design supports following modules:
Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
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CR00100-01-DBC82A* | 08_C8_8MB | REV01 | 8MByte | -- | -- | -- | -- | CR00100-01-FBC82A | 16_C8_8MB | REV01 | 8MByte | -- | -- | -- | -- |
*used as reference |
Design supports following carriers:
*used as reference |
Additional HW Requirements:
Additional Hardware | Notes |
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USB cable for JTAG/UART | Check Carrier Board and Programmer for correct type |
*used as reference |
Content
For general structure and usage of the reference design, see Project Delivery - Intel devices
Design Sources
Type | Location | Notes |
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Quartus | <project folder>/source_files/quartus <project folder>/source_files/<Board Part Short Name>/quartus | Quartus project will be generated by TE Scripts optional, source files for specific assembly variants | Software | <project folder>/source_files/software <project folder>/source_files/<Board Part Short Name>/software | Additional software will be generated by TE Scripts optional, source files for specific assembly variants |
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Prebuilt
Notes : - prebuilt files
- Template Table:
File | File-Extension | Description |
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SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware | SRAM Object File | *.sof | Ram configuration file | Programmer Object File | *.pof | FPGA configuration file | JTAG Indirect Configuration file | *.jic | Flash configuration file | Raw binary file | *.rbf | FPGA configuration file | Software-Application-File | *.elf | Software application for NIOS II processor system | Diverse Reports | --- | Report files in different formats |
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File | File-Extension | Description |
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SOPC Information File | *.sopcinfo | File with description of the .qsys file to create software for the target hardware | SRAM Object File | *.sof | Ram configuration file | Software-Application-File | *.elf | Software application for NIOS II processor system | Diverse Reports | --- | Report files in different formats |
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Download
Reference Design is only usable with the specified Quartus version. Do never use different versions of Quartus software for the same project.
Reference Design is available on:
Design Flow
Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first launch. |
Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.
See also:
- Project Delivery - Intel devices
The Trenz Electronic FPGA Reference Designs are TCL-script based projects. To create a project, open a project or program a device execute "create_project_win.cmd" on Windows OS and "create_project_linux.sh" on Linux OS.
TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel Quartus/SDK GUI. For currently Scripts limitations on Win OS and Linux OS see: Project Delivery - Intel devices → Currently limitations of functionality
- Open create_project_win.cmd/create_project_linux.sh:
- Select Board in "Board selection"
- Click on "Create project" button to create project
- (optional for manual changes) Select correct quartus installation path in "<project folder>/settings/design_basic_settings.tcl"
Launch
Note: - Programming and Startup procedure
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Programming
Check Module and Carrier TRMs for proper HW configuration before you try any design. |
MAX10 Flash
- Connect JTAG and power on carrier with module
- Open create_project_win.cmd/create_project_linux.sh
- Select correct board in "Board selection"
- Click on "Program device" button
- if prebuilt files are available: select "Program prebuilt file"
- using own generated programming file: select "Program other file" and click on "Browse ..." to open own generated programming file
- (optional) click on "Open programmer GUI" to program device with Quartus programmer GUI
- Click on "Start program device" button
JTAG
Not used on this example.
Usage
- Prepare HW like described on section CR00100 Test Board#Programming
- Connect UART USB (most cases same as JTAG)
- Power on PCB
- Press user button 'S2' to toggle between two frequencies for the blinking led 'LED2'
UART
- Open Serial Console (e.g. PuTTY)
select COM Port
Win OS: see device manager Linux OS: see dmesg | grep tty (UART is *USB1) |
- Speed: 115200
- Press reset button
- Console output depends on used Software project, see Software Design - SDK#Application
System Design - Quartus
Block Design
The block designs may differ depending on the assembly variant.
Software Design - SDK
Application
---------------------------------------------------------- General Example: hello_tei0006Hello TEI0006 is a Hello World example as endless loop instead of one console output. |
Used software project depends on board assembly variant. Template location: <project folder>/source_files/software/
hello_cr00100
This is a Hello World example as endless loop instead of one console output.
Appx. A: Change History and Legal Notices
Document Change History
To get content of older revision got to "Change History" of this page and select older document revision number.
- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
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Date | Document Revision | Authors | Description |
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| | | | -- | all | | -- |
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Legal Notices