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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware |
Table of contents |
Firmware for PCB CPLD with designator U4. CPLD Device in Chain: LCMX02-256HC
See Document Change History
| Name / opt. VHD Name | Direction | Pin | Description |
|---|---|---|---|
| DONE | in | 13 | FPGA DONE signal |
| EN1 / EN_SC3 | in | 16 | B2B Enable Pin |
| F_TCK / C_TCK | out | 28 | JTAG FPGA |
| F_TDI / C_TDI | out | 27 | JTAG FPGA |
| F_TDO / C_TDO | in | 23 | JTAG FPGA |
| F_TMS / C_TMS | out | 25 | JTAG FPGA |
| JTAGEN | in | 26 | Enable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access) |
| MODE / MODE_SC1 | in | 11 | B2B Boot Mode Pin |
| NOSEQ | in | 12 | B2B NOSEQ Pin |
| PG_ALL | in | 10 | Power good from 1.8V Sence on U23 |
| PGOOD / STAT_SC2 | out | 14 | B2B PGOOD |
| PROG_B | out | 17 | FPGA PROG_B Reset |
| RESIN / nRST_SC0 | in | 8 | B2B Reset |
| SYSLED1 / LED_GREEN | out | 9 | Green LED D2 |
| SYSLED2 / LED_RED | out | 5 | Red LED D1 |
| TCK / M_TCK | in | 30 | JTAG B2B |
| TDI / M_TDI | in | 32 | JTAG B2B |
| TDO / M_TDO | out | 1 | JTAG B2B |
| TMS / M_TMS | in | 29 | JTAG B2B |
| ULI_2 / XB_SC | out | 20 | FPGA Bank 35 Pin J5 |
| ULI_CPLD / UFL | out | 4 | J1 (Ultra Small Sufrace Mount Coax) |
| ULI_SYSTEM / XA_SC | in | 21 | FPGA Bank 35 Pin G3 |
JTAG signals routed directly through the CPLD to FPGA. Access between CPLD and FPGA can be multiplexed via JTAGEN (logical one for CPLD, logical zero for FPGA) on JM1-89.
PROG_B is nRST_SC0 and PG_ALL and EN_SC3 after power on delay.
Power Good (STAT_SC2) is PGALL and EN_SC3.
MODE_SC1 is connected to XB_SC.
XA_SC is connected to UFL.
Green LED D2
| Status | Description |
|---|---|
| On | Done is low, FPGA not programmed |
| OFF | Done is high, FPGA is programmed |
Red LED D1
| Status | Condition | Description |
|---|---|---|
| Blinking | PROG_B is low | nRST_SC0 or PG_ALL or EN_SC3 is low |
| User Defined | PROG_B is high | XA_SC is connected to LED |
To get content of older revision got to "Change History" of this page and select older document revision number.
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| Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description |
|---|---|---|---|---|---|
| REV01 | REV02 |
| ||
| v.3 | REV01 | REV02 | John Hartfiel |
| |
| 2018-03-21 | v.1 | REV01 | REV02 |
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| All |