System Control CPLD

TE0841-01 has a small 256 Macrocell CPLD on-board to perform some basic System Control functionality.

Main Functions

• JTAG Multiplexing (forwarding)
• Reset and POR_B Control
• LED Control
• PUDC Control
• Global powerdown Control

In minimal standard function the CPLD sets PUDC value (low or high), and forwards reset, JTAG and LED to/from the FPGA.

System Control CPLD can implement many advance functions as well, some list of possible extra functionality:

• Programmable Watchdog
• Power up time counter

System Control IP Core

This is small IP Core to help setting up fixed hardware functions on TE0841 and to communicate with the System Controller CPLD. This care provides optional Interface ports to attach to System Controller (MicroBlaze MCS based Microcontroller running System Control Firmware).

SoM Settings:

• Oscillator Enable
• DDR4 Power Control
• GT Transceiver Power Control

The above settings can be to to either:

• Fixed OFF/Disabled
• Fixed ON/Enabled
• User Controlled
• MicroBlaze MCS Controlled

System Controller

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