<!-- Template Revision 1.2 --> |
Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware |
Table of contents |
Firmware for PCB-Master CPLD with designator U17. CPLD Device: LCMX02-1200HC
See Document Change History
Name | Direction | Pin | Description | PCB REV2 Exception |
---|---|---|---|---|
C_T1 | 24 | / currently_not_used | NC | |
C_T2 | 26 | / currently_not_used | NC | |
C_T3 | 25 | / currently_not_used | NC | |
C_TCK | 131 | / currently_not_used | ||
C_TDI | 136 | / currently_not_used | ||
C_TDO1 | 137 | / currently_not_used | ||
C_TMS | 130 | / currently_not_used | ||
CAN_FAULT | in | 106 | CAN / currently_not_used | |
CAN_RX | in | 107 | CAN / currently_not_used | |
CAN_S | out | 105 | CAN / currently_not_used | |
CAN_TX | out | 104 | CAN / currently_not_used | |
CLK_125MHZ / PHY_CLK | in | 70 | / currently_not_used | |
CON_NTRST | 117 | / currently_not_used | ||
CON_RTCK / JTAG_RTCK | out | 125 | JTAG, Connector J30 | |
CON_SRST / JTAG_SRST | in | 127 | JTAG, Connector J30 | |
CON_TCK / JTAG_TCK | in | 122 | JTAG, Connector J30 | |
CON_TDI / JTAG_TDI | in | 119 | JTAG, Connector J30 | |
CON_TDO / JTAG_TDO | out | 126 | JTAG, Connector J30 | |
CON_TMS / JTAG_TMS | in | 121 | JTAG, Connector J30 | |
DIR_T1 | 23 | / currently_not_used | NC | |
DIR_T2 | 28 | / currently_not_used | NC | |
DIR_T3 | 27 | / currently_not_used | NC | |
DP_AUX_DE / DP_DE | out | 92 | Display Port | |
DP_AUX_RX / DP_RX | in | 91 | Display Port | |
DP_AUX_TX / DP_TX | out | 93 | Display Port | |
DP_EN | out | 77 | Display Port | |
DP_TX_HPD /DP_HDP | in | 94 | Display Port | |
ETH_RST | out | 62 | Ethernet | |
EX_IO1 | 112 | / currently_not_used | ||
EX_IO2 | 113 | / currently_not_used | ||
EX_IO3 | 114 | / currently_not_used | ||
EX_IO4 | 115 | / currently_not_used | ||
F2_EN | 19 | / currently_not_used | NC | |
F2PWM | 20 | / currently_not_used | NC | |
F2SENSE | 21 | / currently_not_used | NC | |
FMC_CLK_DIR | in | 73 | FMC | |
FMC_TCK | out | 95 | FMC | |
FMC_TDI | out | 96 | FMC | |
FMC_TDO | in | 97 | FMC | |
FMC_TMS | out | 98 | FMC | |
FMC_VID0 | out | 139 | FMC VADJ Power Selection | |
FMC_VID1 | out | 140 | FMC VADJ Power Selection | |
FMC_VID2 | out | 141 | FMC VADJ Power Selection | |
GND | 84 | REV03 unconnected / currently_not_used | USB_TRST, other USB HUB | |
HDIO_SC10 / SC10 | inout | 60 | DP_RX/DP_RX or 'Z' | |
HDIO_SC11 / SC11 | in | 59 | DP_DE | |
HDIO_SC12 / SC12 | out | 58 | DP_HPD | |
HDIO_SC13 / SC13 | out | 57 | RGPIO TX | |
HDIO_SC14 / SC14 | in | 56 | RGPIO RX | |
HDIO_SC15 / SC15 | in | 55 | RGPIO CLK | |
HDIO_SC16 | 54 | / currently_not_used | ||
HDIO_SC17 | 52 | / currently_not_used | ||
HDIO_SC18 / SC18 | in | 68 | ||
HDIO_SC19 / SC19 | in | 69 | ||
I2C_RST | out | 61 | ||
JTAGENB | 120 | external Pin for CPLD Firmware Update | ||
LED_1A / JLED1 | out | 109 | ||
LED_2A / JLED2A | out | 111 | ||
LED_2B / JLED2B | out | 110 | ||
MIO26 | in | 41 | ||
MIO27 | in | 40 | ||
MIO28 | in | 39 | ||
MIO29 | in | 38 | ||
OCLK_EN / OSC_EN | out | 74 | ||
PHY_CONFIG | out | 65 | ||
PHY_LED0 | in | 67 | ||
PHY_LED1 | in | 86 | ||
PHY_LED2 | in | 85 | ||
SC_CLK0 / CLK0 | in | 76 | / currently_not_used | SC_CLK_P |
SC_CLK1 / CLK1 | in | 75 | / currently_not_used | SC_CLK_N |
SC_IO0 / X0 | in | 50 | ||
SC_IO1 / X1 | in | 49 | ||
SC_IO2 / X2 | in | 48 | ||
SC_IO3 / X3 | in | 47 | ||
SC_IO4 / X4 | out | 45 | ||
SC_IO5 / X5 | out | 44 | ||
SC_IO6 / X6 | out | 43 | Sanity check to other CPLD (FMC VADJ Enable) | |
SC_IO7 / X7 | out | 42 | Sanity check to other CPLD (FMC VADJ Enable) | |
SC_IO8 | 22 | / currently_not_used | NC | |
SC_SCL / SCL | in | 14 | ||
SC_SDA / SDA | in | 13 | ||
SC2_SW3 / SW3 | in | 6 | ||
SC2_SW4 / SW4 | in | 5 | ||
SD_WP | in | 100 | ||
SFP_LED1 / SFP_LED0 | out | 81 | ||
SFP_LED2 / SFP_LED1 | out | 82 | ||
SFP_LED3 / SFP_LED2 | out | 78 | ||
SFP_LED4 / SFP_LED3 | out | 83 | ||
SFP1_LOS | 32 | / currently_not_used | NC, controlled by FPGA | |
SFP1_TX_DIS | out | 33 | NC, controlled by FPGA | |
SFP2_LOS | 35 | / currently_not_used | NC, controlled by FPGA | |
SFP2_TX_DIS | out | 34 | NC, controlled by FPGA | |
STAT_LED0 / LED0 | 99 | / currently_not_used | ||
STAT_LED1 / LED1 | 128 | / currently_not_used | ||
USB0_RST / USB_RST | out | 71 | USB (U9) PHY Reset | also USB HUB Reset |
USBH_LED_G3 | 11 | / currently_not_used | NC | |
USBH_LED_G4 | 12 | / currently_not_used | NC | |
USBH_LED_SS1 | 9 | / currently_not_used | NC | |
USBH_LED_SS2 / dummy | out | 133 | Dummy Signal / currently_not_used | NC |
USBH_LED_SS3 | 132 | / currently_not_used | NC | |
USBH_LED_SS4 | 138 | / currently_not_used | NC | |
USBH_MODE0 | out | 142 | NC, other USB HUB | |
USBH_MODE1 | out | 143 | NC, other USB HUB | |
USBH_RST | out | 10 | NC, other USB HUB | |
XMOD1_A | 3 | / currently_not_used | ||
XMOD1_B | 2 | / currently_not_used | ||
XMOD1_E | out | 4 | ||
XMOD1_G | in | 1 |
JTAGENB set carrier board CPLD into the chain for firmware update. For Update set DIP S4-3 to ON.
JTAG Signal
Older Revision (PCB REV03) to REV04
Older Revision (PCB REV02) to REV04
To get content of older revision got to "Change History" of this page and select older document revision number.
Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description |
---|---|---|---|---|---|
| REV04 | (REV02 Special Firmware!), REV03,REV04 | Work in progress | ||
2016-12-14 | v.1 | --- | Initial release | ||
All |