Table of Contents |
Overview
Refer to "https://shop.trenz-electronic.de/en/Download/?path=Trenz_Electronic/TE0745" for downloadable version of this manual and the rest of available documentation. |
The Trenz Electronic TE0745 is an industrial-grade SoC module integrating a Xilinx Zynq-7 (Z-7030, Z-7035 or Z-7045), 1 GByte DDR3/L SDRAM, 32 MByte SPI Flash memory for configuration and operation and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking strips.
Block Diagram
Main Components
- Xilinx ZYNQ-7000 family SoC, U1
- 256 Mbit Quad SPI Flash Memory Micron N25Q256A, U12
- Low Power Programmable Oscillator SiTime SiT8008BI @33.333 MHz, U12
- Low Power Programmable Oscillator SiTime SiT8008BI @25.000 MHz, U9
- Marvell Alaska 88E1512 Gigabit Ethernet PHY, U3
- Intelligent Memory 512 MByte DDR3L-1600 SDRAM (8 Banks a 32 MWords, 16 Bit Word-Width), U3
- TI TPS51206 DDR3 Memory Termination Regulator with buffered reference votlage VTTREF, U18
- Intersil ISL12020MIRZ Real-Time-Clock, U24
- TI TCA9517 Level-shifting I²C bus repeater, U17
- LED D2 red
- LED D1 green
- Intelligent Memory 512 MByte DDR3L-1600 SDRAM (8 Banks a 32 MWords, 16 Bit Word-Width), U5
- Altera Enpirion EN63A0QI 12A DCDC PowerSoC @1.0V (VCCINT), U4
- TI TPS74401RGW LDO DC/DC regulator @1.2V (MGTAVTT), U8
- TI TPS72018DRVR LDO DC/DC regulator @1.8V (MGTAUX), U6
- TI TPS74401RGW LDO DC/DC regulator @1.0V (MGTAVCC), U11
- Silicon Labs Si5338A I²C Programmable Quad Clock Generator, U13
- Low Power Programmable Oscillator SiTime SiT8008BI @25.000 MHz, U21
- Samtec ST5-80-1.50-L-D-P-TR 160-pin stacking strips (2 rows a 80 positions), J3
- Samtec ST5-80-1.50-L-D-P-TR 160-pin stacking strips (2 rows a 80 positions), J1
- Samtec ST5-80-1.50-L-D-P-TR 160-pin stacking strips (2 rows a 80 positions), J2
- 256 Mbit Quad SPI Flash Memory (Micron N25Q256A, U14
- Microchip USB3320 USB PHY Transceiver, U32
- Low Power Programmable Oscillator SiTime SiT8008BI @52.000 MHz, U33
- Microchip 24AA025E48 EEPROM for MAC Address
- Lattice Semiconductor MachXO2-256HC System Controller CPLD, U2
Key Features
- Xilinx Zynq Z-7030/Z-7035/Z-7045
- 1 GByte 32-Bit DDR3/L
- 32 MByte SPI Flash
- B2B Connectors 3 x 160 pins
- 250 I/O's, all HR and HP I/O
- 1 Gbit Ethernet PHY
- USB 2.0 OTG PHY
- 8 x GTX (7030: 4 GT)
- 2 GT Reference Clock inputs (7030: 1 REFCLK
- Reference clock input for PLL (optional)
- 2 x PLL outputs
- I2C
- 6 MIO
- RTC
- MAC Address EEPROM
I2C Address Map
Device | | |
---|
RTC | 0x6F | |
RTC RAM | 0x57 | |
MAC Address EEPROM | 0x53 | |
Si5338 PLL | 0x70 | |
B2B connectors
Technical Specifications
Absolute Maximum Ratings
Recommended Operating Conditions
Physical Dimensions
Module size: 52 mm × 76 mm. Please download the assembly diagram for exact numbers
Mating height with standard connectors: 4mm
PCB thickness: 1.6mm
Highest part on PCB: approx. 3mm. Please download the step model for exact numbers
All dimensions are given in millimeters.
Operating Temperature Ranges
Commercial grade: 0°C to +70°C.
Industrial grade: -40°C to +85°C.
The module operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Weight
.. g - Plain module
.. g - Set of bolts and nuts
Revision History
Hardware Revision History
Date | Revision | Notes | Link to PCN | Documentation Link |
---|
2016-10-11 | 02 | Production release | | TE0745-02 |
2016-04-18 | 01 | Prototypes | | TE0745-01 |
Hardware revision number is written on the PCB board together with the module model number separated by the dash.
Document Change History
Date | Revision | Contributors | Description |
---|
2017-02-05 | | Jan Kumann | Initial document. |
Disclaimer