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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware

Table of contents

Overview

CPLD Device: LCMX02-256HC

Feature Summary

Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

Name / opt. VHD NameDirectionPinDescription
C_TCK / BDBUS0in30UART from FTDI
C_TDI  / BDBUS1out32UART to FTDI
C_TDO / BDBUS2in1/ currently_not_used
C_TMS / BDBUS3in29/ currently_not_used
CSI_GPIO0 / CSI_IO0out25drive by MIO52
CSI_GPIO1 / CSI_IO1out23drive by MIO53
DONEin8FPGA DONE Pin
DSI_C_N 12/ currently_not_used
DSI_C_P 11/ currently_not_used
DSI_D0_N 10/ currently_not_used
DSI_D0_P 9/ currently_not_used
DSI_D1_N 14/ currently_not_used
DSI_D1_P 13/ currently_not_used
DSI_XA 16/ currently_not_used
DSI_XB 17/ currently_not_used
GLEDout5LED
JMODE 26Enable JTAG access to CPLD for Firmware update (zero: normal IOs, one: CPLD JTAG access). Selectable over J15 Jumper
MIO52in20connected to CSI_GPIO0
MIO53in21connected to CSI_GPIO1
MIO8in28UART from Zynq
MIO9out27UART to Zynq
RLEDout4LED

 

Functional Description

CSI-GPIO

CSI_GPIO0 drives by MIO52, CSI_GPIO1 drives by MIO53.

DSI

Not used

LED

LEDDescription
GREENON when Zynq Done pin is down else OFF
REDUART activity

 

Appx. A: Change History and Legal Notices

Revision Changes

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

DateDocument RevisionCPLD Firmware RevisionSupported PCB RevisionAuthorsDescription


 

REV01REV01, REV02, REV03


Revision 01 finished
2017-03-02

v.1

REV01REV01, REV02, REV03


Initial release
 All  
 

Legal Notices