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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/SC-CPLD-Firmware |
Table of contents |
CPLD Device with designator U11: LCMX02-256HC
See Document Change History
| Name / opt. VHD Name | Direction | Pin | Description |
|---|---|---|---|
| C_TCK / BDBUS0 | in | 30 | UART from FTDI |
| C_TDI / BDBUS1 | out | 32 | UART to FTDI |
| C_TDO / BDBUS2 | in | 1 | / currently_not_used |
| C_TMS / BDBUS3 | in | 29 | / currently_not_used |
| CSI_GPIO0 / CSI_IO0 | out | 25 | drive by MIO52 |
| CSI_GPIO1 / CSI_IO1 | out | 23 | drive by MIO53 |
| DONE | in | 8 | FPGA DONE Pin |
| DSI_C_N | 12 | / currently_not_used | |
| DSI_C_P | 11 | / currently_not_used | |
| DSI_D0_N | 10 | / currently_not_used | |
| DSI_D0_P | 9 | / currently_not_used | |
| DSI_D1_N | 14 | / currently_not_used | |
| DSI_D1_P | 13 | / currently_not_used | |
| DSI_XA | 16 | / currently_not_used | |
| DSI_XB | 17 | / currently_not_used | |
| GLED | out | 5 | LED |
| JMODE | 26 | Enable JTAG access to CPLD for Firmware update (zero: normal IOs, one: CPLD JTAG access). Selectable over J15 Jumper | |
| MIO52 | in | 20 | connected to CSI_GPIO0 |
| MIO53 | in | 21 | connected to CSI_GPIO1 |
| MIO8 | in | 28 | UART from Zynq |
| MIO9 | out | 27 | UART to Zynq |
| RLED | out | 4 | LED |
UART connection between MIO8/9 and BDBUS0/1.
CSI_GPIO0 drives by MIO52, CSI_GPIO1 drives by MIO53.
Not used
| LED | Description |
|---|---|
| GREEN | ON when Zynq Done pin is down else OFF |
| RED | UART activity |
To get content of older revision got to "Change History" of this page and select older document revision number.
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| Date | Document Revision | CPLD Firmware Revision | Supported PCB Revision | Authors | Description |
|---|---|---|---|---|---|
| REV01 | REV01, REV02, REV03 | document style update | ||
| 2017-05-22 | v.3 | REV01 | REV01, REV02, REV03 | John Hartfiel | Revision 01 finished |
| 2017-03-02 | v.1 | REV01 | REV01, REV02, REV03 | Initial release | |
| All |
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