Template Revision 2.9
- Module: TRM Name always "TE Series Name" +TRM
Example: "TE0728 TRM" - Carrier: TRM Name usually "TEB Series Name" +TRM
Example: "TEB0728 TRM"
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Note for Download Link of the Scroll ignore macro: |
Table of Contents |
Overview
The Trenz Electronic TEBT0782 is a carrier for TE0782, TE0783 and TE0784 module.
Refer to http://trenz.org/tebt0782-info for the current online version of this manual and other available documentation.
Key Features
Note: 'Key Features' description: Important components and connector or other Features of the module → please sort and indicate assembly options |
- 3 x Samtec ASP-122953-01 160-pin stackable, compatible with TE078x
- 2 mm MC LB2-A Soldered Connector for power supply (12V input)
- 4 SMA connectors for MGT
- 2 x 12 pin headers for XMOD
- 1 x DIP switch for modules CPLD Access
- 2 x RJ45 Connector
- USB A Stacked Connector
- Equipped with two TE0790 XMOD FTDI JTAG adapters
- Voltage regulators
- Dimension: 115 x 115 mm
Block Diagram
Main Components
Notes : - Picture of the PCB (top and bottom side) with labels of important components
- Add List below
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- RJ45 Transceivers, J1-J2
- USB A Stacked, U7
- XMOD JTAG/UART Adapter, J7
- JTAG CPLD Adapter -J8
- 2 Line Common Mode Choke, J10
- Non-isolated power jack (VIN), J9-J11
- DIP Switch, S1
- SMA Coxial Connectors (MGT_TX), J3-J4
- SMA Coxial Connectors (MGT_RX), J5-J6
- Board to Board Connector, JB1
- Board to Board Connector, JB3
- Board to Board Connector, JB2
Initial Delivery State
Notes : Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture. If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
Storage device name | Content | Notes |
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- | - | - |
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Configuration Signals
- Overview of Boot Mode, Reset, Enables.
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The general Reset is provided through button S1 on TE0790 XMOD J7.
Signal | B2B | Note |
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RESIN | JBC3-130 | Board Reset |
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Signals, Interfaces and Pins
Notes : - For carrier or stand-alone boards use subsection for every connector type (add Designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
B2B Connector | Interface | Number of I/O | Notes |
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JB1
| RJ45, J1B-J1C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | RJ45, J1A | 4 Differential pair, 8 Single Ended | PHY1 MDIO | RJ45, J2B-J2C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | RJ45, J2A | 4 Differential pair, 8 Single Ended | PHY2 MDIO | TE0790 Base, J8 | 4 Single Ended |
| TE0790 Base, J7 | 1 Single Ended |
| USB A Stacked, U7 | 2 Single Ended | USB | Power Switch, U1 | 2 Single Ended |
| SMD Line Filter, L6 | 1 Differential pair, 2 Single Ended | USB1_D | SMD Line Filter, L7 | 1 Differential pair, 2 Single Ended | USB2_D | ESD protection diode, U5 | 1 Single Ended | USB1_VBUS | ESD protection diode, U8 | 1 Single Ended | USB2_VBUS | JB2
| Module TE078x FPGA, Bank 111-112 | 16 Differential pair, 32 Single Ended | MGT_RX8...15, MGT_TX8...15 | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B34_VRP, J1_B34_VRN | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B33_VRP, J1_B33_VRN | JB3
| TE0790 Base, J8 | 4 Single Ended | M_TCK, M_TMS, M_TDO, M_TDI | TE0790 Base, J7 | 4 Single Ended 2 Single Ended 1 Single Ended | TCK, TMS, TDO, TDI UART RX/TX RESIN | DIP Switch, S1-A | 1 Single Ended | JTAGENB | SMA Coaxial, J3...6 | 2 Differential pair, 4 Single Ended | MGT_RX0, MGT_TX0 | Module TE0782...4 FPGA, Bank 109-110 | 16 Differential pair, 32 Single Ended | MGT_RX1...7, MGT_TX0...7 |
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XMOD Pin Header
JTAG/UART to Module SoC/FPGA
JTAG access to the TE078x SoM is available through B2B connector JB3. JTAG access is provided by TE0790 XMOD Adapter on Pin Header J7.
JTAG Interface Pins | Signal Name | B2B Connector | Notes |
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A | XMOD_A | JB3C-129 | UART | B | XMOD_B | JB3C-135 | UART | C | TCK | JB3C-141 | JTAG | D | TDO | JB3C-148 | JTAG | E | CPLD_GPIO4 | JB1A-18 |
| F | TDI | JB3C-147 | JTAG | G | RESIN | JB3C-130 | General Reset | H | TMS | JB3C-142 | JTAG | 3.3V | 3.3V_M | JB1- JB3 |
| VIO | 3.3V_M | JB1- JB3 | 3.3V |
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JTAG/ GPIO to Module CPLD
JTAG access to the System Controller CPLD is provided through B2B connector J3. JTAG access to CPLD is provided by TE0790 XMOD Adapter on Pin Header J8.
Pin 'JTAGENB' must be set high, using DIP Switch S1-A in order to program the System Controller CPLD via JTAG interaface.
JTAG Interface Pins | Signal Name | B2B Connector | Notes |
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A | CPLD_GPIO0 | JB1A-10 |
| B | CPLD_GPIO1 | JB1A-12 |
| C | M_TCK | JB3B-81 |
| D | M_TDO | JB3B-88 |
| E | CPLD_GPIO2 | JB1A-14 |
| F | M_TDI | JB3B-87 |
| G | CPLD_GPIO3 | JB1A-16 |
| H | M_TMS | JB3B-82 |
| 3.3V | 3.3V_CPLD | JB1- JB3 |
| VIO | 3.3V_CPLD | JB1- JB3 | 3.3V |
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DIP Switch S2 on TE0790 must be set and fixed like the following table.
DIP Switch | Setting | Notes |
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S2-1 | ON | JTAGENB (Enable/Disable module JTAG CPLD IOs) | S2-2 | OFF | NC | S2-3 | OFF | NC | S2-4 | OFF | NC |
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RJ45 Connectors
Signal Name | RJ45-J1 Pin | RJ45-J2 Pin | Notes |
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B2B |
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PHY_MDI0_P | JB1A-23 | JB1A-39 |
| PHY_MDI0_N | JB1A-21 | JB1A-37 |
| PHY_MDI1_P | JB1A-19 | JB1A-35 |
| PHY_MDI1_N | JB1A-17 | JB1A-33 |
| PHY_MDI2_P | JB1A-15 | JB1A-31 |
| PHY_MDI2_N | JB1A-13 | JB1A-29 |
| PHY_MDI3_P | JB1A-11 | JB1A-27 |
| PHY_MDI3_N | JB1A-9 | JB1A-25 |
| J2_TX9_P | JB1A-95 | - | LED Green/Yellow | J2_TX9_N | JB1A-97 | - | LED Green/Yellow | J2_RX9_N | - | JB1A-96 | LED Green/Yellow | J2_RX9_P | - | JB1A-98 | LED Green/Yellow |
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USB A Stacked Socket
The USB A Stacked (U7) is a dual port USB Socket which provides two USB ports.
Signal Name | Port A | Port B | Notes |
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B2B | Connected to | B2B | Connected to |
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USB_D_P | JB1A-28 | SMD Line Filter, L7 | JB1A-40 | SMD Line Filter, L6 |
| USB_D_N | JB1A-26 | SMD Line Filter, L7 | JB1A-38 | SMD Line Filter, L6 |
| USB_VBUS | JB1A-24 | SMD Line Filter, L7 | JB1A-36 | SMD Line Filter, L6 |
| VBUS_V_EN | JB1A-30 | Power Switch, U1 | JB1A-32 | Power Switch, U1 |
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SMA Coaxial
The TEBT0782 carrier is equipped with 4x SMA Coaxial straight connectors.
Designator | Schematic | B2B | Notes |
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J3 | MGT_TX0_N | JB3A-29 | Transfer | J4 | MGT_TX0_P | JB3A-31 | Transfer | J5 | MGT_RX0_N | JB3A-30 | Receive | J6 | MGT_RX0_P | JB3A-32 | Receive |
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Test Points
Test Point | Signals | B2B Connector | Notes |
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TP 1 | VBAT_I | JB3-124 |
| TP 2 | OTG2_ID | JB1-22 |
| TP 3 | OTG1_ID | JB1-34 |
| TP 4 | USB1_VBUS | JB1-36 |
| TP 5 | USB2_VBUS | JB1-24 |
| TP 6 | M_TCK | JB3-81 |
| TP 7 | M_TDO | JB3-88 |
| TP 8 | M_TDI | JB3-87 |
| TP 9 | M_TMS | JB3-82 |
| TP 10 | TCK | JB3-141 |
| TP 11 | TDO | JB3-148 |
| TP 12 | TDI | JB3-147 |
| TP 13 | TMS | JB3-142 |
| TP 14 | VIN | JB1-165...168 |
| TP 15 | 5V | - |
| TP 16 | 3.3V_CPLD | JB1-147...148 |
| TP 17-18 | GND | - |
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On-board Peripherals
Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
DIP Switch
Switch | Connected to | B2B | Notes |
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S1-A | JTABENB | JB3C-136 |
| S1-B...D | - | - | Not connected |
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Power and Power-On Sequence
In 'Power and Power-on Sequence' section there are three important digrams which must be drawn: - Power on-sequence
- Power distribution
- Voltage monitoring circuit
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Power Supply
Power supply with minimum current capability of 3A for system startup is recommended.
Power Consumption
Power Input Pin | Typical Current |
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VIN | TBD* |
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* TBD - To Be Determined
Power Distribution Dependencies
12V power supply (VIN) on J9/J11 (2 mm MC LB2-A solder-in) or on J10 (TE1.5/2-3.5H).
Power-On Sequence
Power Rails
Power Rail Name | B2B JB1 Pin | B2B JB2 Pin | B2B JB3 Pin | Direction | Notes |
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VIN | 165, 166, 167, 168 | - | - | Input/Output | Directly to module | 3.3V_M | 99, 100, 111,112, 123, 124, 135, 136, 159, 160, 169, 170, 171, 172 | - | 99, 100, 159, 160 | Input/Output | 160, 169, 170, 171, 172 are output other ones input for IO Banks | 3.3V_CPLD | 147,148 | - | - | Output | Directly to module | 1.8V_M | - | 99,100, 159, 160, 169, 170, 171, 172 | 124 | Input/Output | 169, 170, 171, 172 are output other ones input for IO Banks | VBAT_IN |
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Board to Board Connectors
- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
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Technical Specifications
Absolute Maximum Ratings
Symbols | Description | Min | Max | Unit | Note |
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VIN | Input supply voltage | -- | -- | V | Attention: Depends on connected module! 171050601 of the TEBT0782 (-0,3V - 40V) | T_STG | Storage Temperature | -40 | +85 | °C | DIP Switch S1 |
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Recommended Operating Conditions
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Parameter | Min | Max | Units | Reference Document |
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VIN | 11.4 | 12.6 | V | Attention: Depends on connected module! See TE078x TRMs, recommended normally 12V Without module: 171050601 of the TEBT0782 (6V - 36V) | T_OPT | -40 | +85 | °C |
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Physical Dimensions
PCB thickness: 1.6 mm.
Currently Offered Variants
Revision History
Hardware Revision History
Date | Revision | Changes | Documentation Link |
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2016-11-05 | 01 | Initial Release | REV01 |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
Document Change History
- Note this list must be only updated, if the document is online on public doc!
- It's semi automatically, so do following
Add new row below first Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template - Metadata is only used of compatibility of older exports
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Date | Revision | Contributor | Description |
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| | | | 2019-10-8 | v.45 | John Hartfiel | update power section - XMOD section
| 2019-10-16 | v.44 | Pedram Babakhani | | -- | all | | |
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Disclaimer