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Table of Contents

Overview

Refer to https://wiki.trenz-electronic.de/display/PD/TE0791+TRM for the current online version of this manual and other available documentation.

The Trenz Electronic TE0791-01 is an adapter board for use with the XMOD TE0790 board. The adapter board provides several connector types to get access to the signals and interfaces of the XMOD board. As further option footprints are available for JST Wire-To-Board IDC connectors with two different pin-assignments.

Key Features

Block Diagram

Figure 1: TE0791-01 block diagram.

Main Components

Figure 2: TE0790-02 main components. Top side view

  1. 2x6 PMOD connector solder pads, J1 (on bottom side)
  2. 6-Pin header solder pads, J8
  3. 12-Pin header solder pads, J2
  4. 10-pin IDC connector solder pads, J4 (solder pads J5 on bottom side)
  5. 6-pin IDC connector solder pads, J3 (solder pads J6 on bottom side)
  6. 2x6 PMOD connector
  7. 1-row 6-pin header female (2.54 mm pitch)
  8. 2-row 12-pin header male (2.54 mm pitch)

Signals, Interfaces and Pins

Top View

Bottom View flipped


Figure 3: Connector Location

2x6 Pin Header

The 2x6 pin header (2.54mm grid size, male) J2 of the TE0791 board have to be connected to the corresponding XMOD pin header on the TE0790 board. The signal assignment of the pin header on the TE0790 board depends on the configuration of its System Controller CPLD firmware.

The pin assignment on the TE0791 adapter board is the same as on the TE0790 XMOD board:

Signal J2 Pin NameJ2 Pin Name Signal
GND 1*GND
User DefinedCAUser Defined
VIO  VDD 3.3V
User DefinedDBUser Defined
User DefinedFEUser Defined
User DefinedHGUser Defined / Button (Reset_n)

Table 1: Pin header J2 signal assignment. *pin 1 on header J2 of the adapter board

1x6 Pin Header

On the female 1-row 6-pin header (2.54mm grid size, female) J8 are the XMOD signals C, D, F and H available. At standard System Controller CPLD firmware, this signals create the JTAG interface of the XMOD board:

J8 Pin Number J8 Pin NameSignalNote
1VIOVCCIOcheck TE0790 DIP-switch settings
2GNDGround-
3CTCK-
4DTDO-
5FTDI-
6HTMS-

Table 2: Pin header J8 signal assignment with standard TE0790 CPLD firmware

2x6 PMOD Header

On the 2x6 PMOD header J1 are all XMOD signals A - H available. The pin- and signal-assignment with standard System Controller CPLD firmware of the XMOD board are as follows:

NoteSignalJ1 Pin Name J1 Pin NumberJ1 Pin NumberJ1 Pin NameSignalNote
-UART TXDA 71CTCK-

-

UART RXDB82DTDO-
usable as GPIOLED on TE0790E93FTDI-
usable as GPIOButton on TE0790G104HTMS-
-Ground GND115GNDGround-
check TE0790 DIP-switch settingsVCC / VCCIO3.3V1263.3VVCC / VCCIOcheck TE0790 DIP-switch settings

Table 3: PMOD J1 signal assignment with standard TE0790 CPLD firmware

10-pin IDC Connector

On the TE0791 board are footprints available for 10-pin JST Wire-To-Board IDC connectors J4 and J5 with two different pin-assignments, where all XMOD signals A - H are available. The pin- and signal-assignment with standard System Controller CPLD firmware of the XMOD board are as follows:

Pin NameJ4 Pin NumberJ5 Pin NumberSignalNote
A110UART TXD
B38UART RXD-
C29TCK-
D47TDO-
E56LED on TE0790usable as GPIO
F65TDI-
G74Button on TE0790usable as GPIO
H83TMS-
VIO92VCC / VCCIOcheck TE0790 DIP-switch settings
GND101Ground-

Table 4: IDC connector J4 and J5 signal assignment with standard TE0790 CPLD firmware

6-pin IDC Connector

On the TE0791 board are footprints available for 6-pin JST Wire-To-Board IDC connectors J3 and J6 with two different pin-assignments, where the XMOD signals C, D, F and H are available. At standard System Controller CPLD firmware, this signals create the JTAG interface of the XMOD board:

Pin NameJ3 Pin NumberJ6 Pin NumberSignalNote
C61TCK-
D52TDO-
F43TDI-
H34TMS-
VIO25VCC / VCCIOcheck TE0790 DIP-switch settings
GND16Ground-

Table 5: IDC connector J3 and J6 signal assignment with standard TE0790 CPLD firmware

Technical Specification

Physical Dimensions

All dimensions are given in millimeters and mil.


Figure 4: Board physical dimensions drawing.

Revision History

Hardware Revision History

DateRevision

Notes

PCNDocumentation Link
-01current available revision-TE0791-01

Table 6: Board hardware revision history.

Document Change History

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Date

Revision

Contributors

Description



John Hartfiel
  • add Figure 3: Connector Location
2017-10-19v.9Ali Naseri
  • initial document

Table 7: Document change history.

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