Introduction

This User Manual describes the Electronic Drive Development Platform (EDDP).

None of the EDDP components are intended to be used in finished products. All the software and hardware parts of the Platform are intended for Developers evaluating Motor Control Applications with Xilinx FPGA and/or SoC Devices.

Requirements

The following is required in addition to what is supplied in the EDDP Kit:

A PC capable of running the Xilinx SDSoC 2017.1.
- Basic knowledge of Xilinx All Programmable FPGA and/or SoC devices, basic knowledge of Xilinx SDK and C/C++ programming in order to be able to adapt the firmware to your requirements.
Micro-USB Cable for the USB console of the Controller Board.
Ethernet-based LAN with a DHCP server and a RJ45 ethernet Cable in order to access the Web UI.

The following is optional:

Custom Controller Board.
Custom motor and encoder.
Power supply DC 5..48V to suit the custom motor power requirements.

Installation

todo

EDDP System - TODO

Hardware - TODO

Software

The software consists of the following parts:

A Linux operating system.
Kernel driver for providing access to the IP cores and buffer memory for the data capture
A user-space program that provides access to the motor control IP cores through the Network API and simultaneously serves as a Web server.
A user interface in the form of a Web UI to the Network API.

The Web UI lets one to operate the motor in one of the following modes:

Speed control.
Stator current I_q control.

To access the Web UI, point a web browser to the IP of the Controller Board. The following web site appears:

Public Docs > EDDP User Manual > uiscreenshot.png

Motor

The default motor is supplied in the EDDP Kit; see the chapter Reference Motor for details

A custom motor must be a three-phase synchronous motor with a quadrature encoder (either single-ended or differential outputs) in order to be able to controlled with the default firmware supplied.

Block Diagram - TODO

Functional description - TODO

Title	Description
FOC SDSoC	Implementation of a Field-Oriented Control algorithm in C++ with Vivado SDSoC
SDSoC Hardware Platform ARTY-Z7	A basis for building Vivado SDSoC applications running on an Arty-Z7 board connected to a TEC0053 board
AXI4-Stream AD7403	An IP core for filtering the delta-sigma bitstream read from one or more ADC-s of type of AD7403 to an AXI4-Stream of samples
AXI4-Stream Encoder	An IP core for converting impulses from a relative index encoder with an index signal to an AXI4-Stream of position and speed data
AXI4-Stream PWM	An IP core for generating PWM signals according to the input AXI4-Stream
AXI4-Stream Concat	An IP core for concatenating AXI4-Streams
Web GUI	A Web UI to control and monitor an EDPS board over the Network API
Network API	A communication protocol, based on Websockets, to control an EDPS board
Embedded Linux Code	A server program interfacing to an EDPS board and implementing the Network API and the functions of a Web Server

Control Board

The default Control Board is the Digilent ARTY-Z 7010, which is delivered as part of the EDDP Kit. This manual contains information relevent to the actual use of the ARTY-Z as a Control Board within the EDDP only; all technical data and user guides and manuals for the Controller Board are provided by the controller board manufacturer.