This User Manual describes the Electronic Drive Development Platform (EDDP).
None of the EDDP components are intended to be used in finished products. All the software and hardware parts of the Platform are intended for Developers evaluating Motor Control Applications with Xilinx FPGA and/or SoC Devices. |
The following is required in addition to what is supplied in the EDDP Kit:
The following is optional:
todo
The software consists of the following parts:
The Web UI lets one to operate the motor in one of the following modes:
To access the Web UI, point a web browser to the IP of the Controller Board. The following web site appears:
Motor
The default motor is supplied in the EDDP Kit; see the chapter Reference Motor for details
A custom motor must be a three-phase synchronous motor with a quadrature encoder (either single-ended or differential outputs) in order to be able to controlled with the default firmware supplied.
A 3-phase motor with an encoder is connected to a TEC0053 board. The TEC0053 board boards consists of a 3-phase power stage to be driven by bipolar PWM signals, current transducers and ADCs to monitor current on 2 (optionally 3) phases and isolating circuitry to provide electrical isolation for the signals on the Control Board Connector.
A TEC0060 board, included in the EDDP Kit, is used as a mechanical and electrical adaptor for the reference motor.
A Control Board connected to the TEC0053 provides the PWM signals for the TEC0053 and the clock signal to the ADC-s; the ADC datastream is read by the Control Board.
TODO: elaborate.
List of the documents for further information:
Title | Description |
---|---|
FOC SDSoC | Implementation of a Field-Oriented Control algorithm in C++ with Vivado SDSoC |
SDSoC Hardware Platform ARTY-Z7 | A basis for building Vivado SDSoC applications running on an Arty-Z7 board connected to a TEC0053 board |
AXI4-Stream AD7403 | An IP core for filtering the delta-sigma bitstream read from one or more ADC-s of type of AD7403 to an AXI4-Stream of samples |
AXI4-Stream Encoder | An IP core for converting impulses from a relative index encoder with an index signal to an AXI4-Stream of position and speed data |
AXI4-Stream PWM | An IP core for generating PWM signals according to the input AXI4-Stream |
AXI4-Stream Concat | An IP core for concatenating AXI4-Streams |
Web GUI | A Web UI to control and monitor an EDPS board over the Network API |
Network API | A communication protocol, based on Websockets, to control an EDPS board |
Embedded Linux Code | A server program interfacing to an EDPS board and implementing the Network API and the functions of a Web Server |
The default Control Board is the Digilent ARTY-Z 7010, which is delivered as part of the EDDP Kit. This manual contains information relevent to the actual use of the ARTY-Z as a Control Board within the EDDP only; all technical data and user guides and manuals for the Controller Board are provided by the controller board manufacturer.