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Table of Contents

Overview

Refer to https://wiki.trenz-electronic.de/display/DRAFT/TE0723+TRM for downloadable version of this manual and additional technical documentation of the product.

 

The Trenz Electronic TE0723 is a Arduino compatible FPGA module based on the Xilinx Zynq XC7Z010 SoC.

Key Features

Additional assembly options are available for cost or performance optimization upon request.

Block Diagram

Figure 1: TE0723 block diagram.

Main Components

Figure 2: Main components of the TE0723 module.

  1. Xilinx Zynq XC7Z010 SoC, U1
  2. 4 Gbit DDR3L 256M x 16 SDRAM, U2
  3. 16 MByte QSPI Flash memory, U5
  4. High-speed CMOS logic analog multiplexer/demultiplexer, U10

  5. 1 MHz low-power operational amplifier, U11
  6. Dual high-speed USB to multipurpose UART/FIFO, U3
  7. 0.5A dual-channel current-limited power switch, U21
  8. Low-power programmable oscillator @ 12.000000 MHz, U7
  9. 2 Kbit Microwire compatible serial EEPROM, U6
  10. 10-pin header, J1
  11. 8-pin header, J2
  12. 10-pin header, J3
  13. Analog input header, J4
  14. 2 x 4-pin header, J5
  15. PMod 2x6 interface header, J6
  16. USB host mode jumper, J7
  17. Micro USB 2.0 Type-B receptacle, J8
  18. Micro USB 2.0 Type-B receptacle, J9
  19. Micro SD card connector with detect signal, J10
  20. Analog input select jumper, J11
  21. 5V supply power input, J12
  22. Reset switch, S1
  23. Red LED, D2
  24. Green LED, D6
  25. Green LED, D7
  26. Ultra-low supply-current voltage monitor, U23
  27. 1A PowerSoC DC-DC converter (3.3 V), U20

  28. 1A PowerSoC DC-DC converter (1.8 V, U19
  29. 1A PowerSoC DC-DC converter (1.35 V), U16
  30. Hi-speed USB 2.0 ULPI transceiver, U18
  31. Low-power programmable oscillator @ 52.000000 MHz, U14
  32. 1A PowerSoC DC-DC converter (1.0 V), U17
  33. JTAG interface testpoints, TP1-TP4

Initial Delivery State

Storage device name

Content

Notes

Quad SPI Flash

Empty

 

Table 1: Initial delivery state of programmable devices on the module.

 

Boot Process

...

Signals, Interfaces and Pins

I/O Signals

List of I/O signals between PS/PL banks and external connectors:

BankTypeConnectorSignal CountVoltageNotes
34HRJ163.3D8 .. 13, SDA, SCL
34HRJ283.3D2 .. 7, RXD, TXD
34HRJ683.3PIO01 .. PIO08
35HRJ473.3

AIN0 .. 5

35HRJ513.3ESP_GPIO2
500MIOJ1063.3SDCARD
501MIOJ543.3ESP_RXD, ESP_TXD, ESP_GPIO0, MOD_RST

Table x: .

JTAG Interface

JTAG access to the Xilinx Zynq XC7Z010 SoC is provided through testpoints TP1-T4.

JTAG Signal

Testpoint

TCK TP3
TDI TP1
TDO TP2
TMS TP4

Table 5: JTAG interface signals.

Default PS MIO Mapping

MIOFunctionConnected ToNotes
0SDCARDJ10-9Card detect switch.
1QSPIU5-1SP0-CS
2QSPIU5-5SPI0-DQ0
3QSPIU5-2SPI0-DQ1
4QSPIU5-3SPI0-DQ2
5QSPIU5-7SPI0-DQ3
6QSPIU5-6SPI0-SCK
7GPIOU18-27USB PHY reset
9LEDD2Red LED
10SDCARDJ10-7DAT0
11SDCARDJ10-3CMD
12SDCARDJ10-5CLK
13SDCARDJ10-8DAT1
14SDCARDJ10-1DAT2
15SDCARDJ10-2CD/DAT3
28USB-OTGU18-7OTG-DATA4
29USB-OTGU18-31OTG-DIR
30USB-OTGU18-29OTG-STP
31USB-OTGU18-2OTG-NXT
32USB-OTGU18-3OTG-DATA0
33USB-OTGU18-4OTG-DATA1
34USB-OTGU18-5OTG-DATA2
35USB-OTGU18-6OTG-DATA3
36USB-OTGU18-1OTG-CLK
37USB-OTGU18-9OTG-DATA5
38USB-OTGU18-10OTG-DATA6
39USB-OTGU18-13OTG-DATA7
48ESPJ5-2ESP_TXD
49ESPJ5-7ESP_RXD
52ESPJ5-6MOD_RST
53ESPJ5-3ESP_GPIO0

I2C Interface

I2C interface pins from the Zynq SoC PL bank 34 are connected to the connector J1. There are no on-board I2C slave devices.

SignalZynq SoC PinConnected To
SDAR13J1-9
SCLP13J1-10

Table x: .

On-board Peripherals

Processing System (PS) Peripherals

NameICIDPS7MIONotes
SPI FlashS25FL127SABMFV10U5QSPI0MIO1 .. MIO6 
LED-D1GPIOMIO9 
USBUSB3320U18USB0MIO28 .. MIO39 
USB Reset-U18GPIOMIO7 

Table x: .

Clocking

Clock SignalFrequencyICSignal, Pin

Processing system (PS) reference clock.

52.000000 MHz

U1

PS_CLK, C7

USB transceiver reference clock.

52.000000 MHz

U18

OTG-RCLK, 26

High-speed USB to multipurpose UART/FIFO oscillator input.12.000000 MHzU3OSCI, 3

Table x: .

On-board LEDs

LEDColorConnected ToDescription and Notes
D2RedMIO9, U1 
D6

Green

Bank 34, U1FPGA_LED
D7

Green

3.3V

PWR_LED

Table x: .

Power and Power-On Sequence

Power Supply

Single 5V power supply with minimum current capability of 2A for system startup is recommended.

Power Consumption

TBD - To Be Determined.

Power-On Sequence

There is no sequence...

Technical Specifications

Absolute Maximum Ratings

Parameter

MinMax

Units

Reference Document

VIN supply voltage

-0.53.6

V

Xilinx datasheet DS187, "Zynq-7000 All Programmable SoC: DC and AC Switching Characteristics".

Storage temperature

-40

+85

°C

 

Table x: .

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
Supply voltage1.143.465 VXilinx datasheet DS187, "Zynq-7000 All Programmable SoC: DC and AC Switching Characteristics".

Table x: .

 

Assembly variants for higher storage temperature range are available on request.

Physical Dimensions

Please note that two different units are used on the figures below, SI system millimeters (mm) and imperial system thousandths of an inch(mil). To convert mils to millimeters and vice versa use formula 100mil's = 2,54mm.

Figure 3: TE0723 module physical dimensions.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Industrial grade: -40°C to +85°C.

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Revision History

Hardware Revision History

DateRevision

Notes

PCNDocumentation Link
2016-07-1503 Click to see PCN.TE0723-03
2015-11-06
02  TE0723-02
 

01

 

  

Table x: TE0723 hardware revision history.

Hardware revision number is printed on the PCB board together with the module model number separated by the dash.

Document Change History

Date

Revision

Contributors

Description

Jan Kumann

Initial document.

Table x: Document change history.

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