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Table of Contents |
Refer to https://wiki.trenz-electronic.de/display/DRAFT/TE0723+TRM for downloadable version of this manual and additional technical documentation of the product. |
The Trenz Electronic TE0723 is a Arduino compatible FPGA module based on the Xilinx Zynq XC7Z010 SoC.
Additional assembly options are available for cost or performance optimization upon request.
Figure 1: TE0723 block diagram.
Figure 2: Main components of the TE0723 module.
High-speed CMOS logic analog multiplexer/demultiplexer, U10
1A PowerSoC DC-DC converter (3.3 V), U20
Storage device name | Content | Notes |
---|---|---|
Quad SPI Flash | Empty |
Table 1: Initial delivery state of programmable devices on the module.
The 7 boot mode strapping pins on the TE0723 module are set to boot the system from quad SPI Flash only. For additional information refer to the TE0723 schematic and Xilinx UG585 Zynq-7000 All Programmable SoC Technical Reference Manual section "Boot Mode Pin Settings".
List of I/O signals between PS/PL banks and external connectors:
Bank | Type | Connector | Signal Count | Voltage | Notes |
---|---|---|---|---|---|
34 | HR | J1 | 6 | 3.3 | D8 .. 13, SDA, SCL |
34 | HR | J2 | 8 | 3.3 | D2 .. 7, RXD, TXD |
34 | HR | J6 | 8 | 3.3 | PIO01 .. PIO08 |
35 | HR | J4 | 7 | 3.3 | AIN0 .. 5 |
35 | HR | J5 | 1 | 3.3 | ESP_GPIO2 |
500 | MIO | J10 | 6 | 3.3 | SDCARD |
501 | MIO | J5 | 4 | 3.3 | ESP_RXD, ESP_TXD, ESP_GPIO0, MOD_RST |
Table x: .
JTAG access to the Xilinx Zynq XC7Z010 SoC is provided through FTDI USB/UART FIFO bridge connected to the J9 Micro USB connector.
MIO | Function | Connected To | Notes | MIO | Function | Connected To | Notes |
---|---|---|---|---|---|---|---|
0 | SDCARD | J10-9 | Card detect switch. | 28 | USB-OTG | U18-7 | OTG-DATA4 |
1 | QSPI | U5-1 | SP0-CS | 29 | USB-OTG | U18-31 | OTG-DIR |
2 | QSPI | U5-5 | SPI0-DQ0 | 30 | USB-OTG | U18-29 | OTG-STP |
3 | QSPI | U5-2 | SPI0-DQ1 | 31 | USB-OTG | U18-2 | OTG-NXT |
4 | QSPI | U5-3 | SPI0-DQ2 | 32 | USB-OTG | U18-3 | OTG-DATA0 |
5 | QSPI | U5-7 | SPI0-DQ3 | 33 | USB-OTG | U18-4 | OTG-DATA1 |
6 | QSPI | U5-6 | SPI0-SCK | 34 | USB-OTG | U18-5 | OTG-DATA2 |
7 | GPIO | U18-27 | USB PHY reset | 35 | USB-OTG | U18-6 | OTG-DATA3 |
9 | LED | D2 | Red LED | 36 | USB-OTG | U18-1 | OTG-CLK |
10 | SDCARD | J10-7 | DAT0 | 37 | USB-OTG | U18-9 | OTG-DATA5 |
11 | SDCARD | J10-3 | CMD | 38 | USB-OTG | U18-10 | OTG-DATA6 |
12 | SDCARD | J10-5 | CLK | 39 | USB-OTG | U18-13 | OTG-DATA7 |
13 | SDCARD | J10-8 | DAT1 | 48 | ESP | J5-2 | ESP_TXD |
14 | SDCARD | J10-1 | DAT2 | 49 | ESP | J5-7 | ESP_RXD |
15 | SDCARD | J10-2 | CD/DAT3 | 52 | ESP | J5-6 | MOD_RST |
53 | ESP | J5-3 | ESP_GPIO0 |
I2C interface pins from the Zynq SoC PL bank 34 are connected to the connector J1. There are no on-board I2C slave devices.
Signal | Zynq SoC Pin | Connected To |
---|---|---|
SDA | R13 | J1-9 |
SCL | P13 | J1-10 |
Table x: .
TE0723 module has up to 512-MBytes of DDR3L SDRAM arranged into 32-bit wide memory bus providing total of 1 GBytes of on-board RAM. Different memory sizes are available optionally.
On-board quad SPI Flash memory S25FL127S (U5) is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application storage. All four SPI data lines are connected to the Zynq SoC's PS, allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the bus width and clock frequency used.
FT2232H...
Hi-speed USB ULPI PHY (U18) is provided with USB3320 from Microchip. The ULPI interface is connected to the Zynq SoC's PS USB0 via MIO28..39, bank 501 (see also section). The I/O voltage is fixed at 3.3V and PHY reference clock input is supplied from the on-board 52.000000 MHz oscillator (U14).
Digitally controlled analog switch TI CD74HC4051...
The Microchip Technology Inc. MCP6001...
The module has following reference clock signals provided by on-board oscillators:
Source | Signal | Frequency | Destination | Pin Name | Notes |
---|---|---|---|---|---|
U14 | PS_CLK | 52.000000 MHz | U1 | PS_CLK_500 | Zynq SoC PS subsystem main clock. |
U14 | OTG-RCLK | 52.000000 MHz | U18 | REFCLK | USB3320C PHY reference clock. |
U7 | OSCI | 12.000000 MHz | U3 | OSCI | FT2232H oscillator input. |
Table x: Reference clock signals.
There are three LEDs on-board TE0723:
LED | Color | Connected To | Description and Notes |
---|---|---|---|
D2 | Red | MIO9, U1 | User LED. |
D6 | Green | U1, bank 34 pin G14 | FPGA_LED |
D7 | Green | 3.3V | PWR_LED, power-on LED. |
Table x: On-board LEDs.
Single 5V power supply with minimum current capability of 2A for system startup is recommended.
TBD - To Be Determined.
There is no specific power-on sequence, system will power-up itself if 5V is present either from J8, J9 or J12.
Module Variant | Xilinx Zynq SoC | DDR3L SDRAM | ARM Cores | PL Cells | LUTs | Flip-Flops | Block RAM | DSP Slices |
---|---|---|---|---|---|---|---|---|
TE0723-02 | XC7Z010-1CLG225C | 128 MBytes | Dual-core | 28K | 17,6K | 35,2K | 2.1 MBytes | 80 |
TE0723-03M | XC7Z010-1CLG225C | 512 MBytes | Dual-core | 28K | 17,6K | 35,2K | 2.1 MBytes | 80 |
TE0723-03-07S-1C | XC7Z007S-1CLG225C | 512 MBytes | Single-core | 23K | 14,4K | 28,8K | 1.8 MBytes | 66 |
Table 8: Module variants.
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
VIN supply voltage | -0.5 | 3.6 | V | Xilinx datasheet DS187. |
Storage temperature | -40 | +85 | °C |
Table x: .
Parameter | Min | Max | Units | Reference Document |
---|---|---|---|---|
Supply voltage | 1.14 | 3.465 | V | Xilinx datasheet DS187. |
Table x: .
Assembly variants for higher storage temperature range are available on request. |
Module size: 68.58 mm × 53.34 mm. Please download the assembly diagram for exact numbers.
PCB thickness: 1.6 mm.
Highest part on PCB: approx. 4 mm. Please download the step model for exact numbers.
Please note that two different units are used on the figures below, SI system millimeters (mm) and imperial system thousandths of an inch(mil). To convert mils to millimeters and vice versa use formula 100mil's = 2,54mm.
Figure 3: TE0723 module physical dimensions.
Commercial grade: 0°C to +70°C.
Industrial grade: -40°C to +85°C.
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Date | Revision | Notes | PCN | Documentation Link |
---|---|---|---|---|
2016-07-15 | 03 | Click to see PCN. | TE0723-03 | |
2015-11-06 | 02 | TE0723-02 | ||
01 |
|
Table x: TE0723 hardware revision history.
Hardware revision number is printed on the PCB board together with the module model number separated by the dash.
Date | Revision | Contributors | Description |
---|---|---|---|
Jan Kumann | Initial document. |
Table x: Document change history.