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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/Trenz+Electronic+Documentation |
Table of contents |
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Date | Vivado | Project Built | Authors | Description |
---|---|---|---|---|
2017-09-22 | 2017.2 | te0715-test_board-vivado_2017.2-build_02_20170922131837.zip te0715-test_board_noprebuilt-vivado_2017.2-build_02_20170922131853.zip | John Hartfiel | initial release |
Issues | Description | Workaround | To be fixed version |
---|---|---|---|
No known issues | --- | --- | --- |
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Software | Version | Note |
---|---|---|
Vivado | 2017.2 | needed |
SDK | 2017.2 | needed |
PetaLinux | 2017.2 | needed |
Basic description of TE Board Part Files is available on TE Board Part Files.
Complete List is available on <design name>/board_files/*_board_files.csv
Design supports following modules:
Module Model | Model Board Short Name | Notes |
---|---|---|
te0715-03-15-1c | 03_15_1c | |
te0715-03-15-1i | 03_15_1i | |
te0715-03-15-2i | 03_15_2i | |
te0715-03-30-1c | 03_30_1c | |
te0715-03-30-1i | 03_30_1i | |
te0715-03-30-3e | 03_30_3e | |
te0715-04-15-1c | 04_15_1c | |
te0715-04-15-1i | 04_15_1i | |
te0715-04-15-2i | 04_15_2i | |
te0715-04-30-1c | 04_30_1c | |
te0715-04-30-1i | 04_30_1i | |
te0715-04-30-3e | 04_30_3e | |
te0715-04-12s-1c | 12s |
Design supports following modules:
Carrier Model | Notes |
---|---|
TE0701 | |
TE0703 | |
TE0705 | |
TE0706 | used as reference carrier |
TEBA0841 |
Additional HW Requirements
Additional Hardware | Notes |
---|---|
USB Cable | |
XMOD Programmer | Carrier Board dependent, only if carrier has no own FTDI |
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For general structure and of the reference design, see Project Delivery
Type | Location | Notes |
---|---|---|
Vivado | <design name>/block_design <design name>/constraints <design name>/ip_lib | Vivado Project will be generated by TE Scripts |
SDK/HSI | <design name>/sw_lib | Additional Software Template for SDK/HSI and apps_list.csv with settings for HSI |
PetaLinux | <design name>/os/petalinux | PetaLinux template with current configuration |
Type | Location | Notes |
---|---|---|
--- | --- | --- |
Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.
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Reference Design is available on:
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Reference Design is also available with prebuilt files. It's recommended to use TE prebuilt files for first lunch. |
Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow. See: Vivado/SDK/SDSoC#XilinxSoftware-BasicUserGuides and Project Delivery
The most Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.
TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI. For currently limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality
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Check Module and Carrier TRMs for proper HW configuration before you try any design. Reference Design is also available with prebuilt files. It's recommended to use TE prebuilt files for first lunch. |
Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging
Not used on this Example.
Not used on this Example.
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/include/ "system-conf.dtsi" / { }; /* default */ /* ETH PHY */ &gem0 { status = "okay"; ethernet_phy0: ethernet-phy@0 { compatible = "marvell,88e1510"; device_type = "ethernet-phy"; reg = <0>; }; }; /* USB PHY */ /{ usb_phy0: usb_phy@0 { compatible = "ulpi-phy"; //compatible = "usb-nop-xceiv"; #phy-cells = <0>; reg = <0xe0002000 0x1000>; view-port = <0x0170>; drv-vbus; }; }; &usb0 { dr_mode = "host"; //dr_mode = "peripheral"; usb-phy = <&usb_phy0>; }; /* I2C */ // i2c PLL: 0x70, i2c eeprom: 0x50 &i2c1 { rtc@6F { // Real Time Clock compatible = "isl12022"; reg = <0x6F>; }; }; |
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To get content of older revision got to "Change History" of this page and select older document revision number.
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Date | Document Revision | Authors | Description |
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| Work in progress | ||
2017-09-11 | v.1 | Initial release | |
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