Table of contents
CPLD Access
Set B2B Pin JM1-89 (JTAGEN) to VDD (3.3V)
With TE0701:
- not possible on TE0701-01 up to TE0701-06
With TE0703 and TE0703 default CPLD firmware:
- Connect MiniUSB cable to J4
- Set DIP Switch S2-2 to OFF and S2-3 to ON position, see TE0703 CPLD - CC703S#CC703S-JTAG
- Power ON the board
- Run "Lattice Diamond Programmer"
Select "Create new project from JTAG chain" and press "OK"
With TE0705:
- Connect MiniUSB cable to J7
- Set DIP Switch S3-ENJTAG, S3-M1 and S3-M2 to ON position, see TE0705 CPLD#JTAG
- Power ON the board
- Run "Lattice Diamond Programmer"
Select "Create new project from JTAG chain" and press "OK"
With TE0706:
- Connect MiniUSB cable to XMOD
- Set DIP Switch S1-2 to OFF position, see TE0706 TRM#4-bitDIP-switch
- Power ON the board
- Run "Lattice Diamond Programmer"
Select "Create new project from JTAG chain" and press "OK"
Available CPLD Firmware
- TE0720 CPLD - Firmware description for different PCB versions and variants
- CPLD firmware REV07 for PCB REV02 , REV03 and REV04 :
- For all module variants as default variant located in "SC-PGM-TE0720-0304_XO2E-07_20220628" folder (Default)
- QSPI/JTAG/SD boot modes and PUDC = 0
- For all module variants located in "SC-PGM-TE0720-0304_XO2E-07_20220628/optional" folder (Optional)
- QSPI/JTAG/SD boot modes and PUDC = 1
- QSPI/SD boot modes and PUDC = 0
- QSPI/SD boot modes and PUDC = 1
- QSPI/JTAG boot modes and PUDC = 0
- QSPI/JTAG boot modes and PUDC = 1
- JTAG/SD boot modes and PUDC = 0
- JTAG/SD boot modes and PUDC = 1
Download
- TE0720/<PCB Revision>/Firmware/
- Use files from the subfolders of your PCB revision
General instructions